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[73.185.129.58]) by smtp.gmail.com with ESMTPSA id d18sm1687396ile.32.2021.08.04.14.02.21 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Wed, 04 Aug 2021 14:02:21 -0700 (PDT) From: Alex Elder To: bjorn.andersson@linaro.org, agross@kernel.org Cc: robh+dt@kernel.org, elder@kernel.org, linux-arm-msm@vger.kernel.org, devicetree@vger.kernel.org, linux-kernel@vger.kernel.org Subject: [PATCH 4/4] arm64: dts: qcom: sm8350: fix IPA interconnects Date: Wed, 4 Aug 2021 16:02:14 -0500 Message-Id: <20210804210214.1891755-5-elder@linaro.org> X-Mailer: git-send-email 2.27.0 In-Reply-To: <20210804210214.1891755-1-elder@linaro.org> References: <20210804210214.1891755-1-elder@linaro.org> MIME-Version: 1.0 Precedence: bulk List-ID: X-Mailing-List: devicetree@vger.kernel.org There should only be two interconnects defined for IPA on the QUalcomm SM8350 SoC. The names should also match those specified by the IPA Device Tree binding. Signed-off-by: Alex Elder --- arch/arm64/boot/dts/qcom/sm8350.dtsi | 8 +++----- 1 file changed, 3 insertions(+), 5 deletions(-) -- 2.27.0 Acked-by: Georgi Djakov diff --git a/arch/arm64/boot/dts/qcom/sm8350.dtsi b/arch/arm64/boot/dts/qcom/sm8350.dtsi index a631d58166b1c..01f60a3bd1c14 100644 --- a/arch/arm64/boot/dts/qcom/sm8350.dtsi +++ b/arch/arm64/boot/dts/qcom/sm8350.dtsi @@ -666,12 +666,10 @@ ipa: ipa@1e40000 { clocks = <&rpmhcc RPMH_IPA_CLK>; clock-names = "core"; - interconnects = <&aggre2_noc MASTER_IPA &gem_noc SLAVE_LLCC>, - <&mc_virt MASTER_LLCC &mc_virt SLAVE_EBI1>, + interconnects = <&aggre2_noc MASTER_IPA &mc_virt SLAVE_EBI1>, <&gem_noc MASTER_APPSS_PROC &config_noc SLAVE_IPA_CFG>; - interconnect-names = "ipa_to_llcc", - "llcc_to_ebi1", - "appss_to_ipa"; + interconnect-names = "memory", + "config"; qcom,smem-states = <&ipa_smp2p_out 0>, <&ipa_smp2p_out 1>;