From patchwork Mon Aug 9 13:59:41 2021 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Krzysztof Kozlowski X-Patchwork-Id: 494040 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org X-Spam-Level: X-Spam-Status: No, score=-18.8 required=3.0 tests=BAYES_00,DKIM_SIGNED, DKIM_VALID, DKIM_VALID_AU, HEADER_FROM_DIFFERENT_DOMAINS, INCLUDES_CR_TRAILER, INCLUDES_PATCH, MAILING_LIST_MULTI, SPF_HELO_NONE, SPF_PASS, URIBL_BLOCKED, USER_AGENT_GIT autolearn=unavailable autolearn_force=no version=3.4.0 Received: from mail.kernel.org (mail.kernel.org [198.145.29.99]) by smtp.lore.kernel.org (Postfix) with ESMTP id A30E2C19F36 for ; Mon, 9 Aug 2021 14:00:31 +0000 (UTC) Received: from vger.kernel.org (vger.kernel.org [23.128.96.18]) by mail.kernel.org (Postfix) with ESMTP id 7EF5161019 for ; Mon, 9 Aug 2021 14:00:31 +0000 (UTC) Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S234929AbhHIOAu (ORCPT ); Mon, 9 Aug 2021 10:00:50 -0400 Received: from smtp-relay-canonical-1.canonical.com ([185.125.188.121]:53190 "EHLO smtp-relay-canonical-1.canonical.com" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S234726AbhHIOAs (ORCPT ); Mon, 9 Aug 2021 10:00:48 -0400 Received: from mail-ed1-f70.google.com (mail-ed1-f70.google.com [209.85.208.70]) (using TLSv1.3 with cipher TLS_AES_256_GCM_SHA384 (256/256 bits) key-exchange X25519 server-signature RSA-PSS (2048 bits) server-digest SHA256) (No client certificate requested) by smtp-relay-canonical-1.canonical.com (Postfix) with ESMTPS id 225CE4067F for ; Mon, 9 Aug 2021 14:00:27 +0000 (UTC) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=canonical.com; s=20210705; t=1628517627; bh=eSyKE1AFnfaY6BXtRpEiu5V1ROG/cgT/uQ8r8pbvKJg=; h=From:To:Subject:Date:Message-Id:In-Reply-To:References: MIME-Version; b=Vjzqrzyp5H+1mjPynCuEA4BryHcHZAs05Uq7koDlQhzhOpbEVBaF5+lM0nJVdD5sh 4TUM8/rzQq6t3R/su0vUEGRmw4LeiBlKk3Dm5kIrca2d77D3HdS3rChSvPeGmlri9t IZgQNfqvL+o89sxy7xhcwqPn4Zcd6MwqhKkz0R5pbdGPnZJTKwPqOY4WF9hV8lMXmR owWb2VVrJqJYLObCTgnNH/SX2BsDHMO15fRkRw+tPQZ26R3oViEgu15HG8htbXE6rl n4ZcVguLr66bb4hQCYfU44HYybgIpCX+rAb1o7usahzOs1xw7fOxp5smabK3/BGhxy mtKKAhN11SRIA== Received: by mail-ed1-f70.google.com with SMTP id p2-20020a50c9420000b02903a12bbba1ebso8891679edh.6 for ; Mon, 09 Aug 2021 07:00:27 -0700 (PDT) X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=1e100.net; s=20161025; h=x-gm-message-state:from:to:subject:date:message-id:in-reply-to :references:mime-version:content-transfer-encoding; bh=eSyKE1AFnfaY6BXtRpEiu5V1ROG/cgT/uQ8r8pbvKJg=; b=miyOaSm+sXw4W2uI94CWto4i5+JCOCl8C9/KepRl7y96CCGxI3QdXpPSd1baTXAhvX gIiMSUH+TKbC64u0MWVyj6eP2pvXtbw4PZ628o2fK/nVWRCKQLXQj1CPdL5R2dBxsf8H 7ZOp1jlPlO9lqy9sn6UIt+7tQZ6UzSc+uRQOvTPmO+UJtjoyiT79y00NSDNXVKW0lgfF DRdehM3P4DQ2kdHEPVrqrEHQMWZSrTPSR6XoelxYIbJ32zFfqVCR2GSNdmugHyqR8WuY X58aixmWF4ddtv2J8CUBALdEbzKrKByCDdwE+uW5q4ZW74XsprRoEOIypmemhdmGmjAM fwVg== X-Gm-Message-State: AOAM531Z444DYHLjOspyqJcvBTvTO3+rzo65X7yrmBAD5o102L5++cUO ZDCKdz4o9pSl22tPLuqO6wDegUQLD4wtNh35XZj9b16lXOGHFyuIc6sPXmCulrvqsuHOFCf9x5K yQjp4JgL91F2UQfj8XmBV8W7ZfUgo8b76Ao99f0I= X-Received: by 2002:a05:6402:10d9:: with SMTP id p25mr29382472edu.51.1628517626633; Mon, 09 Aug 2021 07:00:26 -0700 (PDT) X-Google-Smtp-Source: ABdhPJwP5usHeWdgEr11aysdbx+/hfzMomo5bPx52fLnvWb5awEbM9i9xf3fnGwfbcscy2TcWSunuA== X-Received: by 2002:a05:6402:10d9:: with SMTP id p25mr29382446edu.51.1628517626413; Mon, 09 Aug 2021 07:00:26 -0700 (PDT) Received: from localhost.localdomain ([86.32.42.198]) by smtp.gmail.com with ESMTPSA id b17sm7909686edd.27.2021.08.09.07.00.25 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Mon, 09 Aug 2021 07:00:26 -0700 (PDT) From: Krzysztof Kozlowski To: Michael Turquette , Stephen Boyd , Rob Herring , Krzysztof Kozlowski , Sylwester Nawrocki , Tomasz Figa , Chanwoo Choi , linux-clk@vger.kernel.org, devicetree@vger.kernel.org, linux-arm-kernel@lists.infradead.org, linux-samsung-soc@vger.kernel.org, linux-kernel@vger.kernel.org Subject: [PATCH 2/3] dt-bindings: clock: samsung: convert S5Pv210 AudSS to dtschema Date: Mon, 9 Aug 2021 15:59:41 +0200 Message-Id: <20210809135942.100744-3-krzysztof.kozlowski@canonical.com> X-Mailer: git-send-email 2.30.2 In-Reply-To: <20210809135942.100744-1-krzysztof.kozlowski@canonical.com> References: <20210809135942.100744-1-krzysztof.kozlowski@canonical.com> MIME-Version: 1.0 Precedence: bulk List-ID: X-Mailing-List: devicetree@vger.kernel.org Convert Samsung S5Pv210 Audio SubSystem clock controller bindings to DT schema format using json-schema. Signed-off-by: Krzysztof Kozlowski --- .../bindings/clock/clk-s5pv210-audss.txt | 53 ------------- .../clock/samsung,s5pv210-audss-clock.yaml | 75 +++++++++++++++++++ 2 files changed, 75 insertions(+), 53 deletions(-) delete mode 100644 Documentation/devicetree/bindings/clock/clk-s5pv210-audss.txt create mode 100644 Documentation/devicetree/bindings/clock/samsung,s5pv210-audss-clock.yaml diff --git a/Documentation/devicetree/bindings/clock/clk-s5pv210-audss.txt b/Documentation/devicetree/bindings/clock/clk-s5pv210-audss.txt deleted file mode 100644 index f6272dcd96f4..000000000000 --- a/Documentation/devicetree/bindings/clock/clk-s5pv210-audss.txt +++ /dev/null @@ -1,53 +0,0 @@ -* Samsung Audio Subsystem Clock Controller - -The Samsung Audio Subsystem clock controller generates and supplies clocks -to Audio Subsystem block available in the S5PV210 and compatible SoCs. - -Required Properties: - -- compatible: should be "samsung,s5pv210-audss-clock". -- reg: physical base address and length of the controller's register set. - -- #clock-cells: should be 1. - -- clocks: - - hclk: AHB bus clock of the Audio Subsystem. - - xxti: Optional fixed rate PLL reference clock, parent of mout_audss. If - not specified (i.e. xusbxti is used for PLL reference), it is fixed to - a clock named "xxti". - - fout_epll: Input PLL to the AudioSS block, parent of mout_audss. - - iiscdclk0: Optional external i2s clock, parent of mout_i2s. If not - specified, it is fixed to a clock named "iiscdclk0". - - sclk_audio0: Audio bus clock, parent of mout_i2s. - -- clock-names: Aliases for the above clocks. They should be "hclk", - "xxti", "fout_epll", "iiscdclk0", and "sclk_audio0" respectively. - -All available clocks are defined as preprocessor macros in -dt-bindings/clock/s5pv210-audss-clk.h header and can be used in device -tree sources. - -Example: Clock controller node. - - clk_audss: clock-controller@c0900000 { - compatible = "samsung,s5pv210-audss-clock"; - reg = <0xc0900000 0x1000>; - #clock-cells = <1>; - clock-names = "hclk", "xxti", - "fout_epll", "sclk_audio0"; - clocks = <&clocks DOUT_HCLKP>, <&xxti>, - <&clocks FOUT_EPLL>, <&clocks SCLK_AUDIO0>; - }; - -Example: I2S controller node that consumes the clock generated by the clock - controller. Refer to the standard clock bindings for information - about 'clocks' and 'clock-names' property. - - i2s0: i2s@3830000 { - /* ... */ - clock-names = "iis", "i2s_opclk0", - "i2s_opclk1"; - clocks = <&clk_audss CLK_I2S>, <&clk_audss CLK_I2S>, - <&clk_audss CLK_DOUT_AUD_BUS>; - /* ... */ - }; diff --git a/Documentation/devicetree/bindings/clock/samsung,s5pv210-audss-clock.yaml b/Documentation/devicetree/bindings/clock/samsung,s5pv210-audss-clock.yaml new file mode 100644 index 000000000000..e56be98c025e --- /dev/null +++ b/Documentation/devicetree/bindings/clock/samsung,s5pv210-audss-clock.yaml @@ -0,0 +1,75 @@ +# SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause) +%YAML 1.2 +--- +$id: http://devicetree.org/schemas/clock/samsung,s5pv210-audss-clock.yaml# +$schema: http://devicetree.org/meta-schemas/core.yaml# + +title: Samsung S5Pv210 SoC Audio SubSystem clock controller + +maintainers: + - Chanwoo Choi + - Krzysztof Kozlowski + - Sylwester Nawrocki + - Tomasz Figa + +description: | + All available clocks are defined as preprocessor macros in + include/dt-bindings/clock/s5pv210-audss.h header. + +properties: + compatible: + const: samsung,s5pv210-audss-clock + + clocks: + minItems: 4 + items: + - description: + AHB bus clock of the Audio Subsystem. + - description: + Optional fixed rate PLL reference clock, parent of mout_audss. If not + specified (i.e. xusbxti is used for PLL reference), it is fixed to a + clock named "xxti". + - description: + Input PLL to the AudioSS block, parent of mout_audss. + - description: + Audio bus clock, parent of mout_i2s. + - description: + Optional external i2s clock, parent of mout_i2s. If not specified, it + is fixed to a clock named "iiscdclk0". + + clock-names: + minItems: 4 + items: + - const: hclk + - const: xxti + - const: fout_epll + - const: sclk_audio0 + - const: iiscdclk0 + + "#clock-cells": + const: 1 + + power-domains: true + + reg: + maxItems: 1 + +required: + - compatible + - clocks + - clock-names + - "#clock-cells" + - reg + +additionalProperties: false + +examples: + - | + clock-controller@c0900000 { + compatible = "samsung,s5pv210-audss-clock"; + reg = <0xc0900000 0x1000>; + #clock-cells = <1>; + clock-names = "hclk", "xxti", "fout_epll", "sclk_audio0"; + clocks = <&clocks DOUT_HCLKP>, <&xxti>, <&clocks FOUT_EPLL>, + <&clocks SCLK_AUDIO0>; + };