From patchwork Wed Aug 25 15:24:52 2021 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Miquel Raynal X-Patchwork-Id: 503052 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org X-Spam-Level: X-Spam-Status: No, score=-16.8 required=3.0 tests=BAYES_00, HEADER_FROM_DIFFERENT_DOMAINS,INCLUDES_CR_TRAILER,INCLUDES_PATCH, MAILING_LIST_MULTI,SPF_HELO_NONE,SPF_PASS,USER_AGENT_GIT autolearn=unavailable autolearn_force=no version=3.4.0 Received: from mail.kernel.org (mail.kernel.org [198.145.29.99]) by smtp.lore.kernel.org (Postfix) with ESMTP id 1CF99C432BE for ; Wed, 25 Aug 2021 15:32:53 +0000 (UTC) Received: from vger.kernel.org (vger.kernel.org [23.128.96.18]) by mail.kernel.org (Postfix) with ESMTP id 07F2A610A4 for ; Wed, 25 Aug 2021 15:32:53 +0000 (UTC) Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S241741AbhHYPdi (ORCPT ); Wed, 25 Aug 2021 11:33:38 -0400 Received: from mslow1.mail.gandi.net ([217.70.178.240]:47819 "EHLO mslow1.mail.gandi.net" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S241676AbhHYPdh (ORCPT ); Wed, 25 Aug 2021 11:33:37 -0400 Received: from relay6-d.mail.gandi.net (unknown [217.70.183.198]) by mslow1.mail.gandi.net (Postfix) with ESMTP id 082AEC08BC; Wed, 25 Aug 2021 15:26:12 +0000 (UTC) Received: (Authenticated sender: miquel.raynal@bootlin.com) by relay6-d.mail.gandi.net (Postfix) with ESMTPSA id 75AD8C0014; Wed, 25 Aug 2021 15:25:49 +0000 (UTC) From: Miquel Raynal To: Jonathan Cameron , Lars-Peter Clausen , Peter Meerwald-Stadler , Rob Herring , Lee Jones , bcousson@baylibre.com, Tony Lindgren , Tero Kristo , Michael Turquette , Stephen Boyd Cc: Thomas Petazzoni , "Ryan J . Barnett" , linux-iio@vger.kernel.org, devicetree@vger.kernel.org, linux-input@vger.kernel.org, linux-omap@vger.kernel.org, linux-clk@vger.kernel.org, Miquel Raynal Subject: [PATCH 14/40] mfd: ti_am335x_tscadc: Don't search the tree for our clock Date: Wed, 25 Aug 2021 17:24:52 +0200 Message-Id: <20210825152518.379386-15-miquel.raynal@bootlin.com> X-Mailer: git-send-email 2.27.0 In-Reply-To: <20210825152518.379386-1-miquel.raynal@bootlin.com> References: <20210825152518.379386-1-miquel.raynal@bootlin.com> MIME-Version: 1.0 Precedence: bulk List-ID: X-Mailing-List: devicetree@vger.kernel.org There is a single clock available in our node, which is named "fck". The clock handler then points to adc_tsc_fck but no need to point directly to it and do a full tree search. Signed-off-by: Miquel Raynal --- drivers/mfd/ti_am335x_tscadc.c | 2 +- 1 file changed, 1 insertion(+), 1 deletion(-) diff --git a/drivers/mfd/ti_am335x_tscadc.c b/drivers/mfd/ti_am335x_tscadc.c index 3afe22680973..d27f8917272d 100644 --- a/drivers/mfd/ti_am335x_tscadc.c +++ b/drivers/mfd/ti_am335x_tscadc.c @@ -202,7 +202,7 @@ static int ti_tscadc_probe(struct platform_device *pdev) * This frequency is valid since TSC_ADC_SS controller design * assumes the OCP clock is at least 6x faster than the ADC clock. */ - clk = devm_clk_get(&pdev->dev, "adc_tsc_fck"); + clk = devm_clk_get(&pdev->dev, NULL); if (IS_ERR(clk)) { dev_err(&pdev->dev, "failed to get TSC fck\n"); err = PTR_ERR(clk);