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Fri, 17 Dec 2021 12:07:26 +0000 From: Sumit Gupta To: , , , , , CC: , , , Subject: [Patch v2 7/9] arm64: tegra: Add node for CBB2.0 in Tegra234 SOC Date: Fri, 17 Dec 2021 17:36:54 +0530 Message-ID: <20211217120656.16480-8-sumitg@nvidia.com> X-Mailer: git-send-email 2.17.1 In-Reply-To: <20211217120656.16480-1-sumitg@nvidia.com> References: <20211217120656.16480-1-sumitg@nvidia.com> X-NVConfidentiality: public MIME-Version: 1.0 X-EOPAttributedMessage: 0 X-MS-PublicTrafficType: Email X-MS-Office365-Filtering-Correlation-Id: ce91bbd3-4804-4848-1b34-08d9c155ccd7 X-MS-TrafficTypeDiagnostic: MN2PR12MB3215:EE_ X-Microsoft-Antispam-PRVS: X-MS-Oob-TLC-OOBClassifiers: OLM:2000; X-MS-Exchange-SenderADCheck: 1 X-MS-Exchange-AntiSpam-Relay: 0 X-Microsoft-Antispam: BCL:0; X-Microsoft-Antispam-Message-Info: nRTN5NKttOeskkIss7kW0pn+c0WG2OVZaeVPIefMlwv2fLT2uBVtrf43MrFgh82gIsRmEiuyPjl9mtlMexXAJy82/XVY2xUo02s4ula0s+DYz0u0k04h2N+NWNITHdGr6Xcnh3SPjUC+kpwWtDU/f3RVhNC5HH/SfPCpezfK2A88IM28B4ZhWJ3LE9UbDwLKKnyXo0IXdQuSxx/BPpgr2QR//cQaV2w4zbp1jon5Vaes89B6ZAUnmiXC6qUfdgoy+52H5x6bR+S1Ew2vg2AERO3JG/vnWfr4zUJDj+/j6IFANyF+k4/e6IVTctZhwmSBpXKZfNrl1mrat/CcMauBJ4ATFxRQ2AsirTce2JIim+/IZsA3oiDM0tXGqesM4x7/ETuG9kfdhIKplpIXpKIJJN+OOsq87PZjKbUq7k6WSoo6b3SPceQNJRjz/wLo1HJ9TD+Hm6yrgJhmmQTfo1tbQYI05PPePypsm9d8Suud/9skS3gf+AuP7pcW9zvXp9Qs2+jDoKKNsF3c9fOK91iV/+MvKEbXx2lkyeOx5husD/dB4jFkPRfimaWNxV8WOQ8k3F39cbwLLj4+2tgkmfTe8/SgpZAa2Q7ze3+LyIxbsMaEARLgxYwBsMDlfeRBFawFplctOwEfnJZFXD6p3NHpQ8kFiq/WPtSpaEAwMa2t47etv9ackdREBR+lp7GGJ4vGVfX6HR+AdgBeExMx9ry+3wQsbVvXT+8iSpALfDG2Qss8btV+qVf/Ph4qLL5o42vKSDMf4g3vvs408Jwnqp0Cl9GIVgby/5/S1i/7zXPCyBnUM6yaea2dh/nrQkC0QUXTpTGalmT6kG/BMWt+SkV/Hg== X-Forefront-Antispam-Report: CIP:12.22.5.236; CTRY:US; LANG:en; SCL:1; SRV:; IPV:CAL; SFV:NSPM; H:mail.nvidia.com; PTR:InfoNoRecords; CAT:NONE; SFS:(4636009)(36840700001)(46966006)(40470700001)(8676002)(316002)(336012)(2906002)(1076003)(426003)(186003)(2616005)(40460700001)(81166007)(86362001)(47076005)(4326008)(5660300002)(356005)(82310400004)(70586007)(36756003)(34020700004)(107886003)(8936002)(6666004)(110136005)(7696005)(70206006)(54906003)(26005)(508600001)(36860700001)(36900700001); DIR:OUT; SFP:1101; X-OriginatorOrg: Nvidia.com X-MS-Exchange-CrossTenant-OriginalArrivalTime: 17 Dec 2021 12:07:30.1728 (UTC) X-MS-Exchange-CrossTenant-Network-Message-Id: ce91bbd3-4804-4848-1b34-08d9c155ccd7 X-MS-Exchange-CrossTenant-Id: 43083d15-7273-40c1-b7db-39efd9ccc17a X-MS-Exchange-CrossTenant-OriginalAttributedTenantConnectingIp: TenantId=43083d15-7273-40c1-b7db-39efd9ccc17a; Ip=[12.22.5.236]; Helo=[mail.nvidia.com] X-MS-Exchange-CrossTenant-AuthSource: CO1NAM11FT033.eop-nam11.prod.protection.outlook.com X-MS-Exchange-CrossTenant-AuthAs: Anonymous X-MS-Exchange-CrossTenant-FromEntityHeader: HybridOnPrem X-MS-Exchange-Transport-CrossTenantHeadersStamped: MN2PR12MB3215 Precedence: bulk List-ID: X-Mailing-List: devicetree@vger.kernel.org Control Backbone(CBB) version 2.0 is used in Tegra234 SOC. Adding nodes to enable handling of errors from different CBB 2.0 based fabrics in Tegra234 SOC. Signed-off-by: Sumit Gupta --- arch/arm64/boot/dts/nvidia/tegra234.dtsi | 42 ++++++++++++++++++++++++ 1 file changed, 42 insertions(+) diff --git a/arch/arm64/boot/dts/nvidia/tegra234.dtsi b/arch/arm64/boot/dts/nvidia/tegra234.dtsi index f0efb3a62804..400403343529 100644 --- a/arch/arm64/boot/dts/nvidia/tegra234.dtsi +++ b/arch/arm64/boot/dts/nvidia/tegra234.dtsi @@ -73,6 +73,20 @@ #mbox-cells = <2>; }; + sce-fabric@b600000 { + compatible = "nvidia,tegra234-sce-fabric"; + reg = <0xb600000 0x40000>; + interrupts = ; + status = "okay"; + }; + + rce-fabric@be00000 { + compatible = "nvidia,tegra234-rce-fabric"; + reg = <0xbe00000 0x40000>; + interrupts = ; + status = "okay"; + }; + hsp_aon: hsp@c150000 { compatible = "nvidia,tegra234-hsp", "nvidia,tegra194-hsp"; reg = <0x0c150000 0x90000>; @@ -109,6 +123,27 @@ interrupt-controller; }; + aon-fabric@c600000 { + compatible = "nvidia,tegra234-aon-fabric"; + reg = <0xc600000 0x40000>; + interrupts = ; + status = "okay"; + }; + + bpmp-fabric@d600000 { + compatible = "nvidia,tegra234-bpmp-fabric"; + reg = <0xd600000 0x40000>; + interrupts = ; + status = "okay"; + }; + + dce-fabric@de00000 { + compatible = "nvidia,tegra234-sce-fabric"; + reg = <0xde00000 0x40000>; + interrupts = ; + status = "okay"; + }; + gic: interrupt-controller@f400000 { compatible = "arm,gic-v3"; reg = <0x0f400000 0x010000>, /* GICD */ @@ -120,6 +155,13 @@ #interrupt-cells = <3>; interrupt-controller; }; + + cbb-fabric@0x13a00000 { + compatible = "nvidia,tegra234-cbb-fabric"; + reg = <0x13a00000 0x400000>; + interrupts = ; + status = "okay"; + }; }; sysram@40000000 {