From patchwork Thu Jan 13 17:07:55 2022 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 8bit X-Patchwork-Submitter: =?utf-8?q?Pali_Roh=C3=A1r?= X-Patchwork-Id: 532366 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org Received: from vger.kernel.org (vger.kernel.org [23.128.96.18]) by smtp.lore.kernel.org (Postfix) with ESMTP id 294B5C433F5 for ; Thu, 13 Jan 2022 17:08:35 +0000 (UTC) Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S233737AbiAMRIe (ORCPT ); Thu, 13 Jan 2022 12:08:34 -0500 Received: from lindbergh.monkeyblade.net ([23.128.96.19]:44762 "EHLO lindbergh.monkeyblade.net" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S237003AbiAMRIc (ORCPT ); Thu, 13 Jan 2022 12:08:32 -0500 Received: from ams.source.kernel.org (ams.source.kernel.org [IPv6:2604:1380:4601:e00::1]) by lindbergh.monkeyblade.net (Postfix) with ESMTPS id 34916C061574; Thu, 13 Jan 2022 09:08:32 -0800 (PST) Received: from smtp.kernel.org (relay.kernel.org [52.25.139.140]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by ams.source.kernel.org (Postfix) with ESMTPS id E3BB2B822C7; Thu, 13 Jan 2022 17:08:30 +0000 (UTC) Received: by smtp.kernel.org (Postfix) with ESMTPSA id 73D89C36AEB; Thu, 13 Jan 2022 17:08:29 +0000 (UTC) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/simple; d=kernel.org; s=k20201202; t=1642093709; bh=dygNr80wMXp+UwmgpjOaiLbn3AABVgQIS8MjdeeyX1Y=; h=From:To:Cc:Subject:Date:From; b=qEuoT1/T6TTqqKVDVsD8XFUDmA2AlXGwyCyA7uaS+waEHNJ+iR68ar4wlGBG8hIrC L5/+yLBCVvnGEDalwTrVXA14daXV6g1aa4a+xI6XquXDW/eal+XtUCNXgGiaYw+s/Z doFYXfWwz3VAVOr7qlBc8TrCIGYn9qMOPrjLMwoFTWsl5YZ/WYw/y9oez7SLTWIvhx ql7HfVehabJB71qvw5Qe4uGwsofc8uJkey2kDY2bh7SVZgxO75R07xDg9gPEkw1j54 o74/vTwXhnTl3bysBufzgtjxGmFN62uTWXESbhIVV/G61LTUlq5qCTS/e4lEZsYeUk HtSMGVBjtFH2A== Received: by pali.im (Postfix) id DAC8A778; Thu, 13 Jan 2022 18:08:26 +0100 (CET) From: =?utf-8?q?Pali_Roh=C3=A1r?= To: Gregory Clement Cc: Andrew Lunn , Sebastian Hesselbarth , Rob Herring , =?utf-8?q?Marek_Beh=C3=BAn?= , linux-arm-kernel@lists.infradead.org, devicetree@vger.kernel.org, linux-kernel@vger.kernel.org Subject: [PATCH] arm64: dts: marvell: armada-37xx: Increase PCIe IO size from 64 KiB to 1 MiB Date: Thu, 13 Jan 2022 18:07:55 +0100 Message-Id: <20220113170755.11856-1-pali@kernel.org> X-Mailer: git-send-email 2.20.1 MIME-Version: 1.0 Precedence: bulk List-ID: X-Mailing-List: devicetree@vger.kernel.org Commit 514ef1e62d65 ("arm64: dts: marvell: armada-37xx: Extend PCIe MEM space") increased size of PCIe MEM to 127 MiB, which is the maximal possible size for allocated 128 MiB PCIe window. PCIe IO size in that commit was unchanged. Armada 3720 PCIe controller supports 32-bit IO space mapping so it is possible to assign more than 64 KiB if address space for IO. Currently controller has assigned 127 MiB + 64 KiB memory and therefore there is 960 KiB of unused memory. So assign it to IO space by increasing IO window from 64 KiB to 1 MiB. DTS file armada-3720-turris-mox.dts already uses whole 128 MiB space, so only update comment about 32-bit IO space mapping. Signed-off-by: Pali Rohár Fixes: 514ef1e62d65 ("arm64: dts: marvell: armada-37xx: Extend PCIe MEM space") --- arch/arm64/boot/dts/marvell/armada-3720-turris-mox.dts | 2 +- arch/arm64/boot/dts/marvell/armada-37xx.dtsi | 4 ++-- 2 files changed, 3 insertions(+), 3 deletions(-) diff --git a/arch/arm64/boot/dts/marvell/armada-3720-turris-mox.dts b/arch/arm64/boot/dts/marvell/armada-3720-turris-mox.dts index dd01409d4bb7..23e1b07c060a 100644 --- a/arch/arm64/boot/dts/marvell/armada-3720-turris-mox.dts +++ b/arch/arm64/boot/dts/marvell/armada-3720-turris-mox.dts @@ -153,7 +153,7 @@ * 2 size cells and also expects that the second range starts at 16 MB offset. If these * conditions are not met then U-Boot crashes during loading kernel DTB file. PCIe address * space is 128 MB long, so the best split between MEM and IO is to use fixed 16 MB window - * for IO and the rest 112 MB (64+32+16) for MEM, despite that maximal IO size is just 64 kB. + * for IO and the rest 112 MB (64+32+16) for MEM. Controller supports 32-bit IO mapping. * This bug is not present in U-Boot ports for other Armada 3700 devices and is fixed in * U-Boot version 2021.07. See relevant U-Boot commits (the last one contains fix): * https://source.denx.de/u-boot/u-boot/-/commit/cb2ddb291ee6fcbddd6d8f4ff49089dfe580f5d7 diff --git a/arch/arm64/boot/dts/marvell/armada-37xx.dtsi b/arch/arm64/boot/dts/marvell/armada-37xx.dtsi index 1c74f02535c6..8d59eabadce6 100644 --- a/arch/arm64/boot/dts/marvell/armada-37xx.dtsi +++ b/arch/arm64/boot/dts/marvell/armada-37xx.dtsi @@ -508,12 +508,12 @@ /* * The 128 MiB address range [0xe8000000-0xf0000000] is * dedicated for PCIe and can be assigned to 8 windows - * with size a power of two. Use one 64 KiB window for + * with size a power of two. Use one 1 MiB window for * IO at the end and the remaining seven windows * (totaling 127 MiB) for MEM. */ ranges = <0x82000000 0 0xe8000000 0 0xe8000000 0 0x07f00000 /* Port 0 MEM */ - 0x81000000 0 0xefff0000 0 0xefff0000 0 0x00010000>; /* Port 0 IO */ + 0x81000000 0 0xeff00000 0 0xeff00000 0 0x00100000>; /* Port 0 IO*/ interrupt-map-mask = <0 0 0 7>; interrupt-map = <0 0 0 1 &pcie_intc 0>, <0 0 0 2 &pcie_intc 1>,