Message ID | 20220301061500.2110569-6-dmitry.baryshkov@linaro.org |
---|---|
State | Accepted |
Commit | 3795221250b60b1a3a9f60a22fd447f2f9e17b57 |
Headers | show |
Series | [1/7] arm64: dts: qcom: sm8450: add PCIe0 PHY node | expand |
diff --git a/arch/arm64/boot/dts/qcom/sm8450-qrd.dts b/arch/arm64/boot/dts/qcom/sm8450-qrd.dts index 9526632d4029..7b6324969a4e 100644 --- a/arch/arm64/boot/dts/qcom/sm8450-qrd.dts +++ b/arch/arm64/boot/dts/qcom/sm8450-qrd.dts @@ -342,6 +342,12 @@ vreg_l6e_1p2: ldo6 { }; }; +&pcie0_phy { + status = "okay"; + vdda-phy-supply = <&vreg_l5b_0p88>; + vdda-pll-supply = <&vreg_l6b_1p2>; +}; + &qupv3_id_0 { status = "okay"; };
Enable PCIe0 PHY on the SM8450 QRD device. Signed-off-by: Dmitry Baryshkov <dmitry.baryshkov@linaro.org> --- arch/arm64/boot/dts/qcom/sm8450-qrd.dts | 6 ++++++ 1 file changed, 6 insertions(+)