| Message ID | 20220514000310.3070578-3-dmitry.baryshkov@linaro.org |
|---|---|
| State | Superseded |
| Headers | show |
| Series | arm64: dts: qcom: enable CDSP and MSS on ifc6560 board | expand |
On 14.05.2022 02:03, Dmitry Baryshkov wrote: > Add device tree node describing CDSP device found on the SDM660 (but not > on SDM630) platform. > > Signed-off-by: Dmitry Baryshkov <dmitry.baryshkov@linaro.org> > --- Lookin' good, but this must be /delete-node/'d on sdm636. Also, I think 660 had a separate smmu for this hw block? Konrad > arch/arm64/boot/dts/qcom/sdm660.dtsi | 68 ++++++++++++++++++++++++++++ > 1 file changed, 68 insertions(+) > > diff --git a/arch/arm64/boot/dts/qcom/sdm660.dtsi b/arch/arm64/boot/dts/qcom/sdm660.dtsi > index 023b0ac4118c..3b70eff68807 100644 > --- a/arch/arm64/boot/dts/qcom/sdm660.dtsi > +++ b/arch/arm64/boot/dts/qcom/sdm660.dtsi > @@ -9,6 +9,74 @@ > > #include "sdm630.dtsi" > > +/ { > + reserved-memory { > + /delete-node/ tzbuffer@94a00000; > + > + cdsp_region: cdsp@94a00000 { > + reg = <0x0 0x94a00000 0x0 0x600000>; > + no-map; > + }; > + > + }; > + > + smp2p-cdsp { > + compatible = "qcom,smp2p"; > + qcom,smem = <94>, <432>; > + interrupts = <GIC_SPI 514 IRQ_TYPE_EDGE_RISING>; > + mboxes = <&apcs_glb 30>; > + qcom,local-pid = <0>; > + qcom,remote-pid = <5>; > + > + cdsp_smp2p_out: master-kernel { > + qcom,entry-name = "master-kernel"; > + #qcom,smem-state-cells = <1>; > + }; > + > + cdsp_smp2p_in: slave-kernel { > + qcom,entry-name = "slave-kernel"; > + interrupt-controller; > + #interrupt-cells = <2>; > + }; > + }; > + > + soc { > + cdsp_pil: remoteproc@1a300000 { > + compatible = "qcom,sdm660-cdsp-pas"; > + reg = <0x1a300000 0x4040>; > + > + interrupts-extended = > + <&intc GIC_SPI 518 IRQ_TYPE_EDGE_RISING>, > + <&cdsp_smp2p_in 0 IRQ_TYPE_EDGE_RISING>, > + <&cdsp_smp2p_in 1 IRQ_TYPE_EDGE_RISING>, > + <&cdsp_smp2p_in 2 IRQ_TYPE_EDGE_RISING>, > + <&cdsp_smp2p_in 3 IRQ_TYPE_EDGE_RISING>; > + interrupt-names = "wdog", "fatal", "ready", > + "handover", "stop-ack"; > + > + clocks = <&rpmcc RPM_SMD_XO_CLK_SRC>; > + clock-names = "xo"; > + > + memory-region = <&cdsp_region>; > + power-domains = <&rpmpd SDM660_VDDCX>; > + power-domain-names = "cx"; > + > + qcom,smem-states = <&cdsp_smp2p_out 0>; > + qcom,smem-state-names = "stop"; > + > + glink-edge { > + interrupts = <GIC_SPI 513 IRQ_TYPE_EDGE_RISING>; > + > + label = "turing"; > + mboxes = <&apcs_glb 29>; > + qcom,remote-pid = <5>; > + #address-cells = <1>; > + #size-cells = <0>; > + }; > + }; > + }; > +}; > + > &adreno_gpu { > compatible = "qcom,adreno-512.0", "qcom,adreno"; > operating-points-v2 = <&gpu_sdm660_opp_table>;
On Sun, 15 May 2022 at 01:51, Konrad Dybcio <konrad.dybcio@somainline.org> wrote: > > > > On 14.05.2022 02:03, Dmitry Baryshkov wrote: > > Add device tree node describing CDSP device found on the SDM660 (but not > > on SDM630) platform. > > > > Signed-off-by: Dmitry Baryshkov <dmitry.baryshkov@linaro.org> > > --- > Lookin' good, but this must be /delete-node/'d on sdm636. Ack for the sdm636, will fix in v2. Or maybe you'd like another approach: move all devices to sdm636 and make sdm660 include sdm636.dtsi? > Also, I think 660 had a separate smmu for this hw block? Yes, there is a separate smmu, however enabling it makes the board reset. I can add it here, but I doubt it is going to be useful till somebody lands IOMMU fixes for this platform. > > Konrad > > arch/arm64/boot/dts/qcom/sdm660.dtsi | 68 ++++++++++++++++++++++++++++ > > 1 file changed, 68 insertions(+) > > > > diff --git a/arch/arm64/boot/dts/qcom/sdm660.dtsi b/arch/arm64/boot/dts/qcom/sdm660.dtsi > > index 023b0ac4118c..3b70eff68807 100644 > > --- a/arch/arm64/boot/dts/qcom/sdm660.dtsi > > +++ b/arch/arm64/boot/dts/qcom/sdm660.dtsi > > @@ -9,6 +9,74 @@ > > > > #include "sdm630.dtsi" > > > > +/ { > > + reserved-memory { > > + /delete-node/ tzbuffer@94a00000; > > + > > + cdsp_region: cdsp@94a00000 { > > + reg = <0x0 0x94a00000 0x0 0x600000>; > > + no-map; > > + }; > > + > > + }; > > + > > + smp2p-cdsp { > > + compatible = "qcom,smp2p"; > > + qcom,smem = <94>, <432>; > > + interrupts = <GIC_SPI 514 IRQ_TYPE_EDGE_RISING>; > > + mboxes = <&apcs_glb 30>; > > + qcom,local-pid = <0>; > > + qcom,remote-pid = <5>; > > + > > + cdsp_smp2p_out: master-kernel { > > + qcom,entry-name = "master-kernel"; > > + #qcom,smem-state-cells = <1>; > > + }; > > + > > + cdsp_smp2p_in: slave-kernel { > > + qcom,entry-name = "slave-kernel"; > > + interrupt-controller; > > + #interrupt-cells = <2>; > > + }; > > + }; > > + > > + soc { > > + cdsp_pil: remoteproc@1a300000 { > > + compatible = "qcom,sdm660-cdsp-pas"; > > + reg = <0x1a300000 0x4040>; > > + > > + interrupts-extended = > > + <&intc GIC_SPI 518 IRQ_TYPE_EDGE_RISING>, > > + <&cdsp_smp2p_in 0 IRQ_TYPE_EDGE_RISING>, > > + <&cdsp_smp2p_in 1 IRQ_TYPE_EDGE_RISING>, > > + <&cdsp_smp2p_in 2 IRQ_TYPE_EDGE_RISING>, > > + <&cdsp_smp2p_in 3 IRQ_TYPE_EDGE_RISING>; > > + interrupt-names = "wdog", "fatal", "ready", > > + "handover", "stop-ack"; > > + > > + clocks = <&rpmcc RPM_SMD_XO_CLK_SRC>; > > + clock-names = "xo"; > > + > > + memory-region = <&cdsp_region>; > > + power-domains = <&rpmpd SDM660_VDDCX>; > > + power-domain-names = "cx"; > > + > > + qcom,smem-states = <&cdsp_smp2p_out 0>; > > + qcom,smem-state-names = "stop"; > > + > > + glink-edge { > > + interrupts = <GIC_SPI 513 IRQ_TYPE_EDGE_RISING>; > > + > > + label = "turing"; > > + mboxes = <&apcs_glb 29>; > > + qcom,remote-pid = <5>; > > + #address-cells = <1>; > > + #size-cells = <0>; > > + }; > > + }; > > + }; > > +}; > > + > > &adreno_gpu { > > compatible = "qcom,adreno-512.0", "qcom,adreno"; > > operating-points-v2 = <&gpu_sdm660_opp_table>;
diff --git a/arch/arm64/boot/dts/qcom/sdm660.dtsi b/arch/arm64/boot/dts/qcom/sdm660.dtsi index 023b0ac4118c..3b70eff68807 100644 --- a/arch/arm64/boot/dts/qcom/sdm660.dtsi +++ b/arch/arm64/boot/dts/qcom/sdm660.dtsi @@ -9,6 +9,74 @@ #include "sdm630.dtsi" +/ { + reserved-memory { + /delete-node/ tzbuffer@94a00000; + + cdsp_region: cdsp@94a00000 { + reg = <0x0 0x94a00000 0x0 0x600000>; + no-map; + }; + + }; + + smp2p-cdsp { + compatible = "qcom,smp2p"; + qcom,smem = <94>, <432>; + interrupts = <GIC_SPI 514 IRQ_TYPE_EDGE_RISING>; + mboxes = <&apcs_glb 30>; + qcom,local-pid = <0>; + qcom,remote-pid = <5>; + + cdsp_smp2p_out: master-kernel { + qcom,entry-name = "master-kernel"; + #qcom,smem-state-cells = <1>; + }; + + cdsp_smp2p_in: slave-kernel { + qcom,entry-name = "slave-kernel"; + interrupt-controller; + #interrupt-cells = <2>; + }; + }; + + soc { + cdsp_pil: remoteproc@1a300000 { + compatible = "qcom,sdm660-cdsp-pas"; + reg = <0x1a300000 0x4040>; + + interrupts-extended = + <&intc GIC_SPI 518 IRQ_TYPE_EDGE_RISING>, + <&cdsp_smp2p_in 0 IRQ_TYPE_EDGE_RISING>, + <&cdsp_smp2p_in 1 IRQ_TYPE_EDGE_RISING>, + <&cdsp_smp2p_in 2 IRQ_TYPE_EDGE_RISING>, + <&cdsp_smp2p_in 3 IRQ_TYPE_EDGE_RISING>; + interrupt-names = "wdog", "fatal", "ready", + "handover", "stop-ack"; + + clocks = <&rpmcc RPM_SMD_XO_CLK_SRC>; + clock-names = "xo"; + + memory-region = <&cdsp_region>; + power-domains = <&rpmpd SDM660_VDDCX>; + power-domain-names = "cx"; + + qcom,smem-states = <&cdsp_smp2p_out 0>; + qcom,smem-state-names = "stop"; + + glink-edge { + interrupts = <GIC_SPI 513 IRQ_TYPE_EDGE_RISING>; + + label = "turing"; + mboxes = <&apcs_glb 29>; + qcom,remote-pid = <5>; + #address-cells = <1>; + #size-cells = <0>; + }; + }; + }; +}; + &adreno_gpu { compatible = "qcom,adreno-512.0", "qcom,adreno"; operating-points-v2 = <&gpu_sdm660_opp_table>;
Add device tree node describing CDSP device found on the SDM660 (but not on SDM630) platform. Signed-off-by: Dmitry Baryshkov <dmitry.baryshkov@linaro.org> --- arch/arm64/boot/dts/qcom/sdm660.dtsi | 68 ++++++++++++++++++++++++++++ 1 file changed, 68 insertions(+)