From patchwork Wed Jun 8 18:00:59 2022 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: William Zhang X-Patchwork-Id: 581011 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org Received: from vger.kernel.org (vger.kernel.org [23.128.96.18]) by smtp.lore.kernel.org (Postfix) with ESMTP id CE036C433EF for ; Wed, 8 Jun 2022 18:03:51 +0000 (UTC) Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S230321AbiFHSDu (ORCPT ); Wed, 8 Jun 2022 14:03:50 -0400 Received: from lindbergh.monkeyblade.net ([23.128.96.19]:58332 "EHLO lindbergh.monkeyblade.net" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S233896AbiFHSBi (ORCPT ); Wed, 8 Jun 2022 14:01:38 -0400 Received: from mail-pl1-x62e.google.com (mail-pl1-x62e.google.com [IPv6:2607:f8b0:4864:20::62e]) by lindbergh.monkeyblade.net (Postfix) with ESMTPS id E3EB11D4DD4 for ; Wed, 8 Jun 2022 11:01:23 -0700 (PDT) Received: by mail-pl1-x62e.google.com with SMTP id d13so2633011plh.13 for ; Wed, 08 Jun 2022 11:01:23 -0700 (PDT) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=broadcom.com; s=google; h=from:to:cc:subject:date:message-id:in-reply-to:references :mime-version; bh=PAGVrHMH68UslJgyjxjwHtJpUjL1ViewPXtTXEi0dpc=; b=RdcAfHy9CqOToFVkO8FDhGafcR8n+kRuGOpf7HaSctym4aSZgX6bSui02iCIZshC0M IbAJRs0iGDY1Juu6chEyEA783bT5Od3ljc9suwgm8oi9g/VL+b0Xz3SfPaPU5AQKEySB B+qvILRStNrLW4LB6KgJLTubEZB2PcCGY1yDA= X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=1e100.net; s=20210112; h=x-gm-message-state:from:to:cc:subject:date:message-id:in-reply-to :references:mime-version; bh=PAGVrHMH68UslJgyjxjwHtJpUjL1ViewPXtTXEi0dpc=; b=uNUdKme64l8tSK7YAuqwl19cLAY5Z3YY7qTG6KDJlWvup+ZTwce86Hdn93d9B8d8KR LyR+M1egK6weeDCenecDjenX/SVudyWr/a7eaDpLKtuOPGuJbQ7hKdoFKrQepcfOZyXz FKUa7/mqGKQrw55P6BdxNkMemy51ewUpnphdcjFsoP6BSlG13xte7eX25+MlhpuonkV8 H5hbSLTqDZT0bWjxIJIIjo8DeEJ89AC+v8i5DWZxt716JykMFaqTim5y5onbZXpfoWV8 vXr3/7EDu0JgdpOt1x2iY7EYKKpt2dbdyIFGzmlBCiD5LvPiJ84wyybKszkCn3g40dTJ gXKA== X-Gm-Message-State: AOAM533JjjUpYTk0lmaYqQGlA3DMTuIVrOgaw2mhvx7/vEhKZ2XiwBht MOIK3oeqXIKualnKVJLSCcJ9Hg== X-Google-Smtp-Source: ABdhPJxyRjxNyO+YeTjMdDKCjI/rGK+MufzrEhFWNSV/btgY1L0R8Arof42vRPy2XJL1NFMaYffl4w== X-Received: by 2002:a17:903:1013:b0:163:e8b9:2429 with SMTP id a19-20020a170903101300b00163e8b92429mr35491759plb.74.1654711282911; Wed, 08 Jun 2022 11:01:22 -0700 (PDT) Received: from T3500-3.dhcp.broadcom.net ([192.19.223.252]) by smtp.gmail.com with ESMTPSA id a70-20020a639049000000b003fd55608671sm9698397pge.27.2022.06.08.11.01.21 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Wed, 08 Jun 2022 11:01:22 -0700 (PDT) From: William Zhang To: Linux ARM List Cc: f.fainelli@gmail.com, Broadcom Kernel List , samyon.furman@broadcom.com, tomer.yacoby@broadcom.com, philippe.reynes@softathome.com, joel.peshkin@broadcom.com, dan.beygelman@broadcom.com, kursad.oney@broadcom.com, anand.gore@broadcom.com, William Zhang , Krzysztof Kozlowski , Rob Herring , devicetree@vger.kernel.org, linux-kernel@vger.kernel.org Subject: [PATCH 2/3] arm64: dts: Add DTS files for bcmbca SoC BCM63146 Date: Wed, 8 Jun 2022 11:00:59 -0700 Message-Id: <20220608180100.31749-3-william.zhang@broadcom.com> X-Mailer: git-send-email 2.36.1 In-Reply-To: <20220608180100.31749-1-william.zhang@broadcom.com> References: <20220608180100.31749-1-william.zhang@broadcom.com> MIME-Version: 1.0 Precedence: bulk List-ID: X-Mailing-List: devicetree@vger.kernel.org Add DTS for ARMv8 based broadband SoC BCM63146. bcm63146.dtsi is the SoC description DTS header and bcm963146.dts is a simple DTS file for Broadcom BCM963146 Reference board that only enable the UART port. Signed-off-by: William Zhang --- arch/arm64/boot/dts/broadcom/bcmbca/Makefile | 3 +- .../boot/dts/broadcom/bcmbca/bcm63146.dtsi | 110 ++++++++++++++++++ .../boot/dts/broadcom/bcmbca/bcm963146.dts | 30 +++++ 3 files changed, 142 insertions(+), 1 deletion(-) create mode 100644 arch/arm64/boot/dts/broadcom/bcmbca/bcm63146.dtsi create mode 100644 arch/arm64/boot/dts/broadcom/bcmbca/bcm963146.dts diff --git a/arch/arm64/boot/dts/broadcom/bcmbca/Makefile b/arch/arm64/boot/dts/broadcom/bcmbca/Makefile index 8c11d90dc7ca..427299b8e63f 100644 --- a/arch/arm64/boot/dts/broadcom/bcmbca/Makefile +++ b/arch/arm64/boot/dts/broadcom/bcmbca/Makefile @@ -1,4 +1,5 @@ # SPDX-License-Identifier: GPL-2.0 dtb-$(CONFIG_ARCH_BCMBCA) += bcm963158.dtb \ bcm96858.dtb \ - bcm94912.dtb + bcm94912.dtb \ + bcm963146.dtb diff --git a/arch/arm64/boot/dts/broadcom/bcmbca/bcm63146.dtsi b/arch/arm64/boot/dts/broadcom/bcmbca/bcm63146.dtsi new file mode 100644 index 000000000000..04de96bd0a03 --- /dev/null +++ b/arch/arm64/boot/dts/broadcom/bcmbca/bcm63146.dtsi @@ -0,0 +1,110 @@ +// SPDX-License-Identifier: (GPL-2.0+ OR MIT) +/* + * Copyright 2022 Broadcom Ltd. + */ + +#include +#include + +/ { + compatible = "brcm,bcm63146", "brcm,bcmbca"; + #address-cells = <2>; + #size-cells = <2>; + + interrupt-parent = <&gic>; + + cpus { + #address-cells = <2>; + #size-cells = <0>; + + B53_0: cpu@0 { + compatible = "brcm,brahma-b53"; + device_type = "cpu"; + reg = <0x0 0x0>; + next-level-cache = <&L2_0>; + enable-method = "psci"; + }; + + B53_1: cpu@1 { + compatible = "brcm,brahma-b53"; + device_type = "cpu"; + reg = <0x0 0x1>; + next-level-cache = <&L2_0>; + enable-method = "psci"; + }; + + L2_0: l2-cache0 { + compatible = "cache"; + }; + }; + + timer { + compatible = "arm,armv8-timer"; + interrupts = , + , + , + ; + }; + + pmu: pmu { + compatible = "arm,cortex-a53-pmu"; + interrupts = , + ; + interrupt-affinity = <&B53_0>, <&B53_1>; + }; + + clocks: clocks { + periph_clk: periph-clk { + compatible = "fixed-clock"; + #clock-cells = <0>; + clock-frequency = <200000000>; + }; + uart_clk: uart-clk { + compatible = "fixed-factor-clock"; + #clock-cells = <0>; + clocks = <&periph_clk>; + clock-div = <4>; + clock-mult = <1>; + }; + }; + + psci { + compatible = "arm,psci-0.2"; + method = "smc"; + }; + + axi@81000000 { + compatible = "simple-bus"; + #address-cells = <1>; + #size-cells = <1>; + ranges = <0x0 0x0 0x81000000 0x8000>; + + gic: interrupt-controller@1000 { + compatible = "arm,gic-400"; + #interrupt-cells = <3>; + interrupt-controller; + reg = <0x1000 0x1000>, + <0x2000 0x2000>, + <0x4000 0x2000>, + <0x6000 0x2000>; + interrupts = ; + }; + }; + + bus@ff800000 { + compatible = "simple-bus"; + #address-cells = <1>; + #size-cells = <1>; + ranges = <0x0 0x0 0xff800000 0x800000>; + + uart0: serial@12000 { + compatible = "arm,pl011", "arm,primecell"; + reg = <0x12000 0x1000>; + interrupts = ; + clocks = <&uart_clk>, <&uart_clk>; + clock-names = "uartclk", "apb_pclk"; + status = "disabled"; + }; + }; +}; diff --git a/arch/arm64/boot/dts/broadcom/bcmbca/bcm963146.dts b/arch/arm64/boot/dts/broadcom/bcmbca/bcm963146.dts new file mode 100644 index 000000000000..e39f1e6d4774 --- /dev/null +++ b/arch/arm64/boot/dts/broadcom/bcmbca/bcm963146.dts @@ -0,0 +1,30 @@ +// SPDX-License-Identifier: (GPL-2.0+ OR MIT) +/* + * Copyright 2022 Broadcom Ltd. + */ + +/dts-v1/; + +#include "bcm63146.dtsi" + +/ { + model = "Broadcom BCM963146 Reference Board"; + compatible = "brcm,bcm963146", "brcm,bcm63146", "brcm,bcmbca"; + + aliases { + serial0 = &uart0; + }; + + chosen { + stdout-path = "serial0:115200n8"; + }; + + memory@0 { + device_type = "memory"; + reg = <0x0 0x0 0x0 0x08000000>; + }; +}; + +&uart0 { + status = "okay"; +};