From patchwork Fri Jun 10 00:21:12 2022 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: William Zhang X-Patchwork-Id: 580900 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org Received: from vger.kernel.org (vger.kernel.org [23.128.96.18]) by smtp.lore.kernel.org (Postfix) with ESMTP id 06191C43334 for ; Fri, 10 Jun 2022 00:22:02 +0000 (UTC) Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S1344249AbiFJAWA (ORCPT ); Thu, 9 Jun 2022 20:22:00 -0400 Received: from lindbergh.monkeyblade.net ([23.128.96.19]:41144 "EHLO lindbergh.monkeyblade.net" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S1344656AbiFJAV7 (ORCPT ); Thu, 9 Jun 2022 20:21:59 -0400 Received: from mail-pl1-x62a.google.com (mail-pl1-x62a.google.com [IPv6:2607:f8b0:4864:20::62a]) by lindbergh.monkeyblade.net (Postfix) with ESMTPS id 584462A433 for ; Thu, 9 Jun 2022 17:21:58 -0700 (PDT) Received: by mail-pl1-x62a.google.com with SMTP id d13so5864114plh.13 for ; Thu, 09 Jun 2022 17:21:58 -0700 (PDT) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=broadcom.com; s=google; h=from:to:cc:subject:date:message-id:in-reply-to:references :mime-version; bh=fLgOsLm4pw+aoQxLBI9rrDALg+WQyVa42qThZoLxL8g=; b=OYmnk3V3DYTrp2goYekvNutJ48Zj1R+1gySjuapblG/nuJfdh5wwgo/rBSEb/ZknhG k39MorgoK/Poo6T5DXqyrxEzWT5K8O0COLfkZZdnzk1HkQ8cSgzyfI/OS5KfAH18Ltpv RD/LxTwr2vYX8c2eaXZdYIz5nCnVIavi0+42A= X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=1e100.net; s=20210112; h=x-gm-message-state:from:to:cc:subject:date:message-id:in-reply-to :references:mime-version; bh=fLgOsLm4pw+aoQxLBI9rrDALg+WQyVa42qThZoLxL8g=; b=dWA+NPOAZT+CxpD66LWKUqSgvroxgzebWOepZpcX60d5KTwBYyO3ZbbjyPNKxNsCD8 0T7ISTx22yOy8v7GXpPG+SAuFRvCK6TZGef05nODYXuGwEd9BVgbRQgahuwie/cp43pd uKTYDQMJzlN5BG2Dm2yoS81sFJgzK9A5LZjWGVK9jGiViXeNqEQ4k0PPu325jCkQLmrf vdeyr8anGIAULrQhf+VPYJuZ+UYV7TRoY+ye5FwEdxcjFQ6H16VXGJRxjDsEuPotORRH e3GcO5elreJfqFd7uQz4d2yjR/D1sNF4sc/1KsrIn9hI3MzJIYT6RAU9mxIWNU8ldc1p Ofrw== X-Gm-Message-State: AOAM531OqeYNlK1qPmCetC+N0yPwKyA1Ea/WcskEopd/jr3lmiropta2 wQKnJR2liuqsfFbWsWSp+zxXPg== X-Google-Smtp-Source: ABdhPJy2IEaOcFCyfzn5RV5Zs4rRKoFnKkEBHuOkncEociw4bwW2WKyGf/c94iTy/sSONhmw8QPy7w== X-Received: by 2002:a17:902:8f87:b0:166:3cf5:335f with SMTP id z7-20020a1709028f8700b001663cf5335fmr41546327plo.119.1654820517766; Thu, 09 Jun 2022 17:21:57 -0700 (PDT) Received: from T3500-3.dhcp.broadcom.net ([192.19.223.252]) by smtp.gmail.com with ESMTPSA id lx9-20020a17090b4b0900b001e292e30129sm288877pjb.22.2022.06.09.17.21.55 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Thu, 09 Jun 2022 17:21:56 -0700 (PDT) From: William Zhang To: Linux ARM List Cc: dan.beygelman@broadcom.com, joel.peshkin@broadcom.com, samyon.furman@broadcom.com, philippe.reynes@softathome.com, Broadcom Kernel List , tomer.yacoby@broadcom.com, f.fainelli@gmail.com, kursad.oney@broadcom.com, anand.gore@broadcom.com, William Zhang , Arnd Bergmann , Krzysztof Kozlowski , Olof Johansson , Rob Herring , devicetree@vger.kernel.org, linux-kernel@vger.kernel.org, soc@kernel.org Subject: [PATCH 2/3] ARM: dts: Add DTS files for bcmbca SoC BCM63148 Date: Thu, 9 Jun 2022 17:21:12 -0700 Message-Id: <20220610002113.14483-3-william.zhang@broadcom.com> X-Mailer: git-send-email 2.36.1 In-Reply-To: <20220610002113.14483-1-william.zhang@broadcom.com> References: <20220610002113.14483-1-william.zhang@broadcom.com> MIME-Version: 1.0 Precedence: bulk List-ID: X-Mailing-List: devicetree@vger.kernel.org Add DTS for ARMv7 based broadband SoC BCM63148. bcm63148.dtsi is the SoC description DTS header and bcm963148.dts is a simple DTS file for Broadcom BCM963148 Reference board that only enable the UART port. Signed-off-by: William Zhang --- arch/arm/boot/dts/Makefile | 1 + arch/arm/boot/dts/bcm63148.dtsi | 103 ++++++++++++++++++++++++++++++++ arch/arm/boot/dts/bcm963148.dts | 30 ++++++++++ 3 files changed, 134 insertions(+) create mode 100644 arch/arm/boot/dts/bcm63148.dtsi create mode 100644 arch/arm/boot/dts/bcm963148.dts diff --git a/arch/arm/boot/dts/Makefile b/arch/arm/boot/dts/Makefile index 28af71650567..123cadcde448 100644 --- a/arch/arm/boot/dts/Makefile +++ b/arch/arm/boot/dts/Makefile @@ -183,6 +183,7 @@ dtb-$(CONFIG_ARCH_BRCMSTB) += \ bcm7445-bcm97445svmb.dtb dtb-$(CONFIG_ARCH_BCMBCA) += \ bcm947622.dtb \ + bcm963148.dtb \ bcm963178.dtb \ bcm96756.dtb \ bcm96846.dtb \ diff --git a/arch/arm/boot/dts/bcm63148.dtsi b/arch/arm/boot/dts/bcm63148.dtsi new file mode 100644 index 000000000000..df5307b6b3af --- /dev/null +++ b/arch/arm/boot/dts/bcm63148.dtsi @@ -0,0 +1,103 @@ +// SPDX-License-Identifier: (GPL-2.0+ OR MIT) +/* + * Copyright 2022 Broadcom Ltd. + */ + +#include +#include + +/ { + compatible = "brcm,bcm63148", "brcm,bcmbca"; + #address-cells = <1>; + #size-cells = <1>; + + interrupt-parent = <&gic>; + + cpus { + #address-cells = <1>; + #size-cells = <0>; + + B15_0: cpu@0 { + device_type = "cpu"; + compatible = "brcm,brahma-b15"; + reg = <0x0>; + next-level-cache = <&L2_0>; + enable-method = "psci"; + }; + + B15_1: cpu@1 { + device_type = "cpu"; + compatible = "brcm,brahma-b15"; + reg = <0x1>; + next-level-cache = <&L2_0>; + enable-method = "psci"; + }; + + L2_0: l2-cache0 { + compatible = "cache"; + }; + }; + + timer { + compatible = "arm,armv7-timer"; + interrupts = , + , + , + ; + }; + + pmu: pmu { + compatible = "arm,cortex-a15-pmu"; + interrupts = , + ; + interrupt-affinity = <&B15_0>, <&B15_1>; + }; + + clocks: clocks { + periph_clk: periph-clk { + compatible = "fixed-clock"; + #clock-cells = <0>; + clock-frequency = <50000000>; + }; + }; + + psci { + compatible = "arm,psci-0.2"; + method = "smc"; + }; + + axi@80030000 { + compatible = "simple-bus"; + #address-cells = <1>; + #size-cells = <1>; + ranges = <0 0x80030000 0x8000>; + + gic: interrupt-controller@1000 { + compatible = "arm,cortex-a15-gic"; + #interrupt-cells = <3>; + interrupt-controller; + reg = <0x1000 0x1000>, + <0x2000 0x2000>, + <0x4000 0x2000>, + <0x6000 0x2000>; + interrupts = ; + }; + }; + + bus@ff800000 { + compatible = "simple-bus"; + #address-cells = <1>; + #size-cells = <1>; + ranges = <0 0xfffe8000 0x8000>; + + uart0: serial@600 { + compatible = "brcm,bcm6345-uart"; + reg = <0x600 0x20>; + interrupts = ; + clocks = <&periph_clk>; + clock-names = "refclk"; + status = "disabled"; + }; + }; +}; diff --git a/arch/arm/boot/dts/bcm963148.dts b/arch/arm/boot/dts/bcm963148.dts new file mode 100644 index 000000000000..98f6a6d09f50 --- /dev/null +++ b/arch/arm/boot/dts/bcm963148.dts @@ -0,0 +1,30 @@ +// SPDX-License-Identifier: (GPL-2.0+ OR MIT) +/* + * Copyright 2019 Broadcom Ltd. + */ + +/dts-v1/; + +#include "bcm63148.dtsi" + +/ { + model = "Broadcom BCM963148 Reference Board"; + compatible = "brcm,bcm963148", "brcm,bcm63148", "brcm,bcmbca"; + + aliases { + serial0 = &uart0; + }; + + chosen { + stdout-path = "serial0:115200n8"; + }; + + memory@0 { + device_type = "memory"; + reg = <0x0 0x08000000>; + }; +}; + +&uart0 { + status = "okay"; +};