From patchwork Thu Aug 11 04:28:54 2022 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Bjorn Andersson X-Patchwork-Id: 596727 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org Received: from vger.kernel.org (vger.kernel.org [23.128.96.18]) by smtp.lore.kernel.org (Postfix) with ESMTP id 3101FC25B0C for ; Thu, 11 Aug 2022 04:26:27 +0000 (UTC) Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S233827AbiHKE0Z (ORCPT ); Thu, 11 Aug 2022 00:26:25 -0400 Received: from lindbergh.monkeyblade.net ([23.128.96.19]:59936 "EHLO lindbergh.monkeyblade.net" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S233709AbiHKE0X (ORCPT ); Thu, 11 Aug 2022 00:26:23 -0400 Received: from mail-oa1-x2f.google.com (mail-oa1-x2f.google.com [IPv6:2001:4860:4864:20::2f]) by lindbergh.monkeyblade.net (Postfix) with ESMTPS id A464419C24 for ; Wed, 10 Aug 2022 21:26:20 -0700 (PDT) Received: by mail-oa1-x2f.google.com with SMTP id 586e51a60fabf-116c7286aaaso4396758fac.11 for ; Wed, 10 Aug 2022 21:26:20 -0700 (PDT) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=linaro.org; s=google; h=content-transfer-encoding:mime-version:references:in-reply-to :message-id:date:subject:cc:to:from:from:to:cc; bh=jUKsu0lhTbXIcD5FnG5XfET8ojcYleI7FIdCXl2Va6Q=; b=blbEER1F1wxbTHQUgg+RH2LGrMyQlbIn/TV0IwctsOdjqWh8z5HKRpgqX/5BlqrKqc kcb9x/aj2qeWPhN7df+rE8jlKHwaLZDC25mD7blN0/ucutZnRmVgBrdjzmjLYosq1uca BVKDQ2AQa75kcKWiToYmeSofNWGK8ROHtCgDu1byrrQYDsa9vJHip1YAx4FkOE6aWPm7 3JloGqC2f0uk9XlSI5UVAsUTZpqntZG2fFrhNY3Vziy4IZCmdN6ObZrlCzjeRQKXtNUN QfNsTXN5M01jbUd8OieaCumLfLgJzQYJTU+Nall1unnWejsp/L8K1qOzrfGsBGY7yGHL karg== X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=1e100.net; s=20210112; h=content-transfer-encoding:mime-version:references:in-reply-to :message-id:date:subject:cc:to:from:x-gm-message-state:from:to:cc; bh=jUKsu0lhTbXIcD5FnG5XfET8ojcYleI7FIdCXl2Va6Q=; b=ir5KF1oS7Xvt1jL7+KPlBF6pH+UzsDzC6oX/Zjf+oF60oWS4+VqADPhLoNgO9PVxLh DpYsHgtGk8b6W9vZI7qyW1PS1aht8YLqGVLvGPosle1C+J1fKMl9/E0/Qxqto327Ze9T XyxZXWpaxPFagQtnYh+t2Bm3YcvtrvMivWogZ0JHAtCpcUETSFkmiRMlXE4WuanM47so +YFNdgVq0k2k6YxbKjusddtvQaHMiiY16VU+oHiFar5ijOGEqo/MUvPM1U5GYYuA3blU txp4cnymxo4ohKhDNkqmFB94A59Y9hZepPuI2fM2LVMleV2IMpsFsoryNsYuE5ZIZZQl H11g== X-Gm-Message-State: ACgBeo1z93uODV7W45HjaWKgohFlQHHk5SN1jlOpZzajkSobbXK3o4xd 676Pu0kxF+SALgYzEIF0FdbwZw== X-Google-Smtp-Source: AA6agR4Sw+tImrRgav7VLc9aizrg5JzFFsQAFPizwinOvwIs4uuvT7ftqEiW7Qsdj84FFaS9zAslPQ== X-Received: by 2002:a05:6870:c6a4:b0:10e:585c:ba1a with SMTP id cv36-20020a056870c6a400b0010e585cba1amr2900443oab.41.1660191979967; Wed, 10 Aug 2022 21:26:19 -0700 (PDT) Received: from ripper.. (104-57-184-186.lightspeed.austtx.sbcglobal.net. [104.57.184.186]) by smtp.gmail.com with ESMTPSA id l17-20020a9d7351000000b006370c0e5be0sm1009517otk.48.2022.08.10.21.26.19 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Wed, 10 Aug 2022 21:26:19 -0700 (PDT) From: Bjorn Andersson To: Andy Gross , Bjorn Andersson , Konrad Dybcio , Stephen Boyd , Rob Herring , Krzysztof Kozlowski , Taniya Das Cc: Michael Turquette , linux-arm-msm@vger.kernel.org, linux-clk@vger.kernel.org, devicetree@vger.kernel.org, linux-kernel@vger.kernel.org Subject: [PATCH 1/2] dt-bindings: clock: Add Qualcomm SC8280XP GPU binding Date: Wed, 10 Aug 2022 21:28:54 -0700 Message-Id: <20220811042855.3867774-2-bjorn.andersson@linaro.org> X-Mailer: git-send-email 2.35.1 In-Reply-To: <20220811042855.3867774-1-bjorn.andersson@linaro.org> References: <20220811042855.3867774-1-bjorn.andersson@linaro.org> MIME-Version: 1.0 Precedence: bulk List-ID: X-Mailing-List: devicetree@vger.kernel.org Add compatible for the Qualcomm SC8280XP GPU. Signed-off-by: Bjorn Andersson --- .../devicetree/bindings/clock/qcom,gpucc.yaml | 2 ++ .../dt-bindings/clock/qcom,gpucc-sc8280xp.h | 35 +++++++++++++++++++ 2 files changed, 37 insertions(+) create mode 100644 include/dt-bindings/clock/qcom,gpucc-sc8280xp.h diff --git a/Documentation/devicetree/bindings/clock/qcom,gpucc.yaml b/Documentation/devicetree/bindings/clock/qcom,gpucc.yaml index 9ebcb1943b0a..a7d0af1bd9e0 100644 --- a/Documentation/devicetree/bindings/clock/qcom,gpucc.yaml +++ b/Documentation/devicetree/bindings/clock/qcom,gpucc.yaml @@ -17,6 +17,7 @@ description: | dt-bindings/clock/qcom,gpucc-sdm845.h dt-bindings/clock/qcom,gpucc-sc7180.h dt-bindings/clock/qcom,gpucc-sc7280.h + dt-bindings/clock/qcom,gpucc-sc8280xp.h dt-bindings/clock/qcom,gpucc-sm6350.h dt-bindings/clock/qcom,gpucc-sm8150.h dt-bindings/clock/qcom,gpucc-sm8250.h @@ -28,6 +29,7 @@ properties: - qcom,sc7180-gpucc - qcom,sc7280-gpucc - qcom,sc8180x-gpucc + - qcom,sc8280xp-gpucc - qcom,sm6350-gpucc - qcom,sm8150-gpucc - qcom,sm8250-gpucc diff --git a/include/dt-bindings/clock/qcom,gpucc-sc8280xp.h b/include/dt-bindings/clock/qcom,gpucc-sc8280xp.h new file mode 100644 index 000000000000..bb7da46333b0 --- /dev/null +++ b/include/dt-bindings/clock/qcom,gpucc-sc8280xp.h @@ -0,0 +1,35 @@ +/* SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause) */ +/* + * Copyright (c) 2021, The Linux Foundation. All rights reserved. + */ + +#ifndef _DT_BINDINGS_CLK_QCOM_GPU_CC_SC8280XP_H +#define _DT_BINDINGS_CLK_QCOM_GPU_CC_SC8280XP_H + +/* GPU_CC clocks */ +#define GPU_CC_PLL0 0 +#define GPU_CC_PLL1 1 +#define GPU_CC_AHB_CLK 2 +#define GPU_CC_CB_CLK 3 +#define GPU_CC_CRC_AHB_CLK 4 +#define GPU_CC_CX_GMU_CLK 5 +#define GPU_CC_CX_SNOC_DVM_CLK 6 +#define GPU_CC_CXO_AON_CLK 7 +#define GPU_CC_CXO_CLK 8 +#define GPU_CC_FREQ_MEASURE_CLK 9 +#define GPU_CC_GMU_CLK_SRC 10 +#define GPU_CC_GX_GMU_CLK 11 +#define GPU_CC_GX_VSENSE_CLK 12 +#define GPU_CC_HUB_AHB_DIV_CLK_SRC 13 +#define GPU_CC_HUB_AON_CLK 14 +#define GPU_CC_HUB_CLK_SRC 15 +#define GPU_CC_HUB_CX_INT_CLK 16 +#define GPU_CC_HUB_CX_INT_DIV_CLK_SRC 17 +#define GPU_CC_SLEEP_CLK 18 +#define GPU_CC_HLOS1_VOTE_GPU_SMMU_CLK 19 + +/* GPU_CC power domains */ +#define GPU_CC_CX_GDSC 0 +#define GPU_CC_GX_GDSC 1 + +#endif