From patchwork Wed Aug 24 23:11:54 2022 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Leo Li X-Patchwork-Id: 599832 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org Received: from vger.kernel.org (vger.kernel.org [23.128.96.18]) by smtp.lore.kernel.org (Postfix) with ESMTP id 3ED5CC04AA5 for ; Wed, 24 Aug 2022 23:12:18 +0000 (UTC) Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S231185AbiHXXMQ (ORCPT ); Wed, 24 Aug 2022 19:12:16 -0400 Received: from lindbergh.monkeyblade.net ([23.128.96.19]:55856 "EHLO lindbergh.monkeyblade.net" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S231164AbiHXXMP (ORCPT ); Wed, 24 Aug 2022 19:12:15 -0400 Received: from inva021.nxp.com (inva021.nxp.com [92.121.34.21]) by lindbergh.monkeyblade.net (Postfix) with ESMTPS id CA2A58000B; Wed, 24 Aug 2022 16:12:13 -0700 (PDT) Received: from inva021.nxp.com (localhost [127.0.0.1]) by inva021.eu-rdc02.nxp.com (Postfix) with ESMTP id 7100C2014E8; Thu, 25 Aug 2022 01:12:12 +0200 (CEST) Received: from smtp.na-rdc02.nxp.com (usphx01srsp001v.us-phx01.nxp.com [134.27.49.11]) by inva021.eu-rdc02.nxp.com (Postfix) with ESMTP id 0BED42014DD; Thu, 25 Aug 2022 01:12:12 +0200 (CEST) Received: from right.am.freescale.net (right.am.freescale.net [10.81.116.134]) by usphx01srsp001v.us-phx01.nxp.com (Postfix) with ESMTP id E4AD24060D; Wed, 24 Aug 2022 16:12:09 -0700 (MST) From: Li Yang To: shawnguo@kernel.org, devicetree@vger.kernel.org Cc: robh+dt@kernel.org, linux-arm-kernel@lists.infradead.org, linux-kernel@vger.kernel.org, Hou Zhiqiang , Li Yang Subject: [PATCH 3/9] arm64: dts: ls1046a: Add big-endian property for PCIe nodes Date: Wed, 24 Aug 2022 18:11:54 -0500 Message-Id: <20220824231200.494-4-leoyang.li@nxp.com> X-Mailer: git-send-email 2.25.1.377.g2d2118b In-Reply-To: <20220824231200.494-1-leoyang.li@nxp.com> References: <20220824231200.494-1-leoyang.li@nxp.com> MIME-Version: 1.0 X-Virus-Scanned: ClamAV using ClamSMTP Precedence: bulk List-ID: X-Mailing-List: devicetree@vger.kernel.org From: Hou Zhiqiang Add the big-endian property for LS1046A PCIe nodes for accessing PEX_LUT and PF register block. Signed-off-by: Hou Zhiqiang Signed-off-by: Li Yang --- arch/arm64/boot/dts/freescale/fsl-ls1046a.dtsi | 6 ++++++ 1 file changed, 6 insertions(+) diff --git a/arch/arm64/boot/dts/freescale/fsl-ls1046a.dtsi b/arch/arm64/boot/dts/freescale/fsl-ls1046a.dtsi index fce3c6401653..f8e8c1415c02 100644 --- a/arch/arm64/boot/dts/freescale/fsl-ls1046a.dtsi +++ b/arch/arm64/boot/dts/freescale/fsl-ls1046a.dtsi @@ -805,6 +805,7 @@ pcie1: pcie@3400000 { <0000 0 0 2 &gic GIC_SPI 110 IRQ_TYPE_LEVEL_HIGH>, <0000 0 0 3 &gic GIC_SPI 110 IRQ_TYPE_LEVEL_HIGH>, <0000 0 0 4 &gic GIC_SPI 110 IRQ_TYPE_LEVEL_HIGH>; + big-endian; status = "disabled"; }; @@ -817,6 +818,7 @@ pcie_ep1: pcie_ep@3400000 { interrupt-names = "pme"; num-ib-windows = <6>; num-ob-windows = <8>; + big-endian; status = "disabled"; }; @@ -843,6 +845,7 @@ pcie2: pcie@3500000 { <0000 0 0 2 &gic GIC_SPI 120 IRQ_TYPE_LEVEL_HIGH>, <0000 0 0 3 &gic GIC_SPI 120 IRQ_TYPE_LEVEL_HIGH>, <0000 0 0 4 &gic GIC_SPI 120 IRQ_TYPE_LEVEL_HIGH>; + big-endian; status = "disabled"; }; @@ -855,6 +858,7 @@ pcie_ep2: pcie_ep@3500000 { interrupt-names = "pme"; num-ib-windows = <6>; num-ob-windows = <8>; + big-endian; status = "disabled"; }; @@ -881,6 +885,7 @@ pcie3: pcie@3600000 { <0000 0 0 2 &gic GIC_SPI 154 IRQ_TYPE_LEVEL_HIGH>, <0000 0 0 3 &gic GIC_SPI 154 IRQ_TYPE_LEVEL_HIGH>, <0000 0 0 4 &gic GIC_SPI 154 IRQ_TYPE_LEVEL_HIGH>; + big-endian; status = "disabled"; }; @@ -893,6 +898,7 @@ pcie_ep3: pcie_ep@3600000 { interrupt-names = "pme"; num-ib-windows = <6>; num-ob-windows = <8>; + big-endian; status = "disabled"; };