From patchwork Mon Sep 5 10:04:13 2022 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: AngeloGioacchino Del Regno X-Patchwork-Id: 602838 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org Received: from vger.kernel.org (vger.kernel.org [23.128.96.18]) by smtp.lore.kernel.org (Postfix) with ESMTP id 159C3C6FA89 for ; Mon, 5 Sep 2022 10:04:43 +0000 (UTC) Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S237453AbiIEKEk (ORCPT ); Mon, 5 Sep 2022 06:04:40 -0400 Received: from lindbergh.monkeyblade.net ([23.128.96.19]:33406 "EHLO lindbergh.monkeyblade.net" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S237442AbiIEKEj (ORCPT ); Mon, 5 Sep 2022 06:04:39 -0400 Received: from madras.collabora.co.uk (madras.collabora.co.uk [IPv6:2a00:1098:0:82:1000:25:2eeb:e5ab]) by lindbergh.monkeyblade.net (Postfix) with ESMTPS id C7986101D7; Mon, 5 Sep 2022 03:04:37 -0700 (PDT) Received: from IcarusMOD.eternityproject.eu (2-237-20-237.ip236.fastwebnet.it [2.237.20.237]) (using TLSv1.3 with cipher TLS_AES_256_GCM_SHA384 (256/256 bits) key-exchange X25519 server-signature RSA-PSS (4096 bits) server-digest SHA256) (No client certificate requested) (Authenticated sender: kholk11) by madras.collabora.co.uk (Postfix) with ESMTPSA id AF8F26601EEC; Mon, 5 Sep 2022 11:04:35 +0100 (BST) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/simple; d=collabora.com; s=mail; t=1662372276; bh=jffXD3T2MOBqqGwvO+kvgVzF9lzP8ZPWA3RUmt8BGfY=; h=From:To:Cc:Subject:Date:In-Reply-To:References:From; b=NKj4IwwP1ArxiD/Yn9oQYg4/iqAs/lypWASlzcKvephHVC2zKUiLfhBIF7KcxGgcW EhYhy3I/uZzl9gI4YNxMTRGMt7RcIUY3PEUVg1gObWdYkJ4FBj2tz7MQZ2LE81NvT1 yRPjYLdUu88Erff+QYeez/IZJt9Z/40nf0QuhgWs1YbDGhoDpPE3ey7R4HWc2Apj9U gSnVJ2XsTkvkz5Mk/Aj4EwV/W5YFG9VlHZNcMfdRkwl2l6sh91HMIH3MleYly625YY sXfcl7qOEoB/a33DA9EQcTgfS0sBbajzzV5x/C9R92o7+7MuDNXnHpFEtzPNg04XLq Wwv7yxF0QkDfw== From: AngeloGioacchino Del Regno To: matthias.bgg@gmail.com Cc: mturquette@baylibre.com, sboyd@kernel.org, angelogioacchino.delregno@collabora.com, wenst@chromium.org, miles.chen@mediatek.com, rex-bc.chen@mediatek.com, nfraprado@collabora.com, chun-jie.chen@mediatek.com, jose.exposito89@gmail.com, drinkcat@chromium.org, weiyi.lu@mediatek.com, devicetree@vger.kernel.org, linux-arm-kernel@lists.infradead.org, linux-mediatek@lists.infradead.org, linux-kernel@vger.kernel.org, linux-clk@vger.kernel.org, robh+dt@kernel.org, krzysztof.kozlowski+dt@linaro.org Subject: [PATCH 07/10] clk: mediatek: clk-mt8195-topckgen: Add GPU clock mux notifier Date: Mon, 5 Sep 2022 12:04:13 +0200 Message-Id: <20220905100416.42421-8-angelogioacchino.delregno@collabora.com> X-Mailer: git-send-email 2.37.2 In-Reply-To: <20220905100416.42421-1-angelogioacchino.delregno@collabora.com> References: <20220905100416.42421-1-angelogioacchino.delregno@collabora.com> MIME-Version: 1.0 Precedence: bulk List-ID: X-Mailing-List: devicetree@vger.kernel.org Following the changes done to MT8183, register a similar notifier for MT8195 as well, allowing safe clockrate updates for the MFGPLL. Signed-off-by: AngeloGioacchino Del Regno Reviewed-by: Miles Chen --- drivers/clk/mediatek/clk-mt8195-topckgen.c | 20 ++++++++++++++++++++ 1 file changed, 20 insertions(+) diff --git a/drivers/clk/mediatek/clk-mt8195-topckgen.c b/drivers/clk/mediatek/clk-mt8195-topckgen.c index e1c3ab4e146b..4dde23bece66 100644 --- a/drivers/clk/mediatek/clk-mt8195-topckgen.c +++ b/drivers/clk/mediatek/clk-mt8195-topckgen.c @@ -1217,6 +1217,21 @@ static const struct of_device_id of_match_clk_mt8195_topck[] = { {} }; +/* Register mux notifier for MFG mux */ +static int clk_mt8195_reg_mfg_mux_notifier(struct device *dev, struct clk *clk) +{ + struct mtk_mux_nb *mfg_mux_nb; + + mfg_mux_nb = devm_kzalloc(dev, sizeof(*mfg_mux_nb), GFP_KERNEL); + if (!mfg_mux_nb) + return -ENOMEM; + + mfg_mux_nb->ops = &clk_mux_ops; + mfg_mux_nb->bypass_index = 0; /* Bypass to TOP_MFG_CORE_TMP */ + + return devm_mtk_clk_mux_notifier_register(dev, clk, mfg_mux_nb); +} + static int clk_mt8195_topck_probe(struct platform_device *pdev) { struct clk_hw_onecell_data *top_clk_data; @@ -1256,6 +1271,11 @@ static int clk_mt8195_topck_probe(struct platform_device *pdev) goto unregister_muxes; top_clk_data->hws[CLK_TOP_MFG_CK_FAST_REF] = hw; + r = clk_mt8195_reg_mfg_mux_notifier(&pdev->dev, + top_clk_data->hws[CLK_TOP_MFG_CK_FAST_REF]->clk); + if (r) + goto unregister_muxes; + r = mtk_clk_register_composites(top_adj_divs, ARRAY_SIZE(top_adj_divs), base, &mt8195_clk_lock, top_clk_data); if (r)