| Message ID | 20221011231727.8090-7-bb@ti.com |
|---|---|
| State | New |
| Headers | show |
| Series | [01/11] thermal: k3_j72xx_bandgap: simplify k3_thermal_get_temp() function | expand |
On 11/10/2022 19:17, Bryan Brattlof wrote: > +then: > + properties: > + reg: > + items: > + - description: VTM cfg1 register space > + - description: VTM cfg2 register space > + - description: | > + A software trimming method must be applied to some Jacinto > + devices to function properly. This eFuse region provides > + the information needed for these SoCs to report > + temperatures accurately. > +else: > + properties: > + reg: > + items: > + - description: VTM cfg1 register space > + - description: VTM cfg2 register space > + BTW, you have additionalProperties:false, so how you coded it won't work. Test your bindings before sending. Best regards, Krzysztof
diff --git a/Documentation/devicetree/bindings/thermal/ti,j72xx-thermal.yaml b/Documentation/devicetree/bindings/thermal/ti,j72xx-thermal.yaml index 0b6a6fa07a532..387628ab35959 100644 --- a/Documentation/devicetree/bindings/thermal/ti,j72xx-thermal.yaml +++ b/Documentation/devicetree/bindings/thermal/ti,j72xx-thermal.yaml @@ -33,16 +33,6 @@ properties: - ti,j721e-vtm - ti,j7200-vtm - reg: - items: - - description: VTM cfg1 register space - - description: VTM cfg2 register space - - description: | - A software trimming method must be applied to some Jacinto - devices to function properly. This eFuse region provides - the information needed for these SoCs to report - temperatures accurately. - power-domains: description: | Should contain the phandle to a power management (PM) domain @@ -52,6 +42,30 @@ properties: "#thermal-sensor-cells": const: 1 +if: + properties: + compatible: + contains: + enum: + - ti,j721e-vtm +then: + properties: + reg: + items: + - description: VTM cfg1 register space + - description: VTM cfg2 register space + - description: | + A software trimming method must be applied to some Jacinto + devices to function properly. This eFuse region provides + the information needed for these SoCs to report + temperatures accurately. +else: + properties: + reg: + items: + - description: VTM cfg1 register space + - description: VTM cfg2 register space + required: - compatible - reg
Only some of TI's J721E SoCs will need a eFuse register range mapped to determine if they're affected by TI's i2128 erratum. All other SoC will not need this eFuse range to be mapped to function properly Update the bindings for the k3_j72xx_bandgap thermal driver so other devices will only need to define two register ranges Signed-off-by: Bryan Brattlof <bb@ti.com> --- .../bindings/thermal/ti,j72xx-thermal.yaml | 34 +++++++++++++------ 1 file changed, 24 insertions(+), 10 deletions(-)