From patchwork Fri Oct 21 16:55:28 2022 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Dmitry Baryshkov X-Patchwork-Id: 617270 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org Received: from vger.kernel.org (vger.kernel.org [23.128.96.18]) by smtp.lore.kernel.org (Postfix) with ESMTP id 48BD5FA373F for ; Fri, 21 Oct 2022 16:56:36 +0000 (UTC) Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S230309AbiJUQ4e (ORCPT ); Fri, 21 Oct 2022 12:56:34 -0400 Received: from lindbergh.monkeyblade.net ([23.128.96.19]:54000 "EHLO lindbergh.monkeyblade.net" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S230386AbiJUQ4O (ORCPT ); Fri, 21 Oct 2022 12:56:14 -0400 Received: from mail-lj1-x22e.google.com (mail-lj1-x22e.google.com [IPv6:2a00:1450:4864:20::22e]) by lindbergh.monkeyblade.net (Postfix) with ESMTPS id 60F9D501B1 for ; Fri, 21 Oct 2022 09:55:49 -0700 (PDT) Received: by mail-lj1-x22e.google.com with SMTP id x18so4573771ljm.1 for ; Fri, 21 Oct 2022 09:55:49 -0700 (PDT) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=linaro.org; s=google; h=content-transfer-encoding:mime-version:references:in-reply-to :message-id:date:subject:cc:to:from:from:to:cc:subject:date :message-id:reply-to; bh=FMEQSClTRMQsJD+9t3DdUS4Nt9IsdcSTttNc0HG6j6A=; b=hzxB0eJP28Iu8l61VnMXnzjgEYOcymrj2maH7pE0gMP+UfyFToDoOWqpSa1aZHcoCd Qh0MYZ9qNGXwQS/UOuaEh5fFU0AQwfSbunDmPS5lJcNPN/4tXvqysZxQGqpbQKWMy0wf Hc1QszhEz7CNu7AC+gHOcU6R0poMUeUyBAUr50qCLfHnxqMqFv37JKYFIizAHlYyWJly B9/rwEJniab2HXPeZVRfUFZwyDzyeMceDx9h4yWVKHHYUkuoxsAHBHdMMPGf62jUlLyE SQzfR5TNWZK32IATo92wvu32BqbJeEFSiX9cd7KlqGmGPmAmQoXrvlPyAGbrn84UWMqQ fb1Q== X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=1e100.net; s=20210112; h=content-transfer-encoding:mime-version:references:in-reply-to :message-id:date:subject:cc:to:from:x-gm-message-state:from:to:cc :subject:date:message-id:reply-to; bh=FMEQSClTRMQsJD+9t3DdUS4Nt9IsdcSTttNc0HG6j6A=; b=GtgkAXxu4e8JHwYzvvhI3bhFMxaEPnYUgxVPlu4oK7fz4B06WCGzw0ErRT9c4YHNd7 cISUY/iuMdwm3fWgJ2WXCJo9WnMmcguNPTana2u+mN3IUTcfS9oZfTnOOK1vMacsRCvl 1vbn3sGEsAlokwM1wI2IEH1xiN/eFobjexo2uVNle3ue38SHMHDoguOECL7B8hhHs0BA MKKNeeBeOStiYKsb37661WE5DCT7th1EG1ydFznvpCmHA5t+ZOHGcVv8aq6VzRI3u/Lf 1YcWRzI5F9515j3Pmp82egma155J6n/Rds9B5C22Xzky0eMrpEjs9vBH3vWVtboOkAAl uIzw== X-Gm-Message-State: ACrzQf2Rg0GNEuGxulRyGTXSJ+Kay5R+Q52CRLAi7FeAVuSmFitU5330 dYXbkvUq6nf45pS3NyrZX5rN1Q== X-Google-Smtp-Source: AMsMyM445/+JMKypTBG8ttI3XH+cJ8iJV4lWsSKuySjmPLbykrki037KJsfLDkwsQljw/8mOaq82iw== X-Received: by 2002:a2e:9859:0:b0:26f:cdad:e00d with SMTP id e25-20020a2e9859000000b0026fcdade00dmr6819009ljj.419.1666371337583; Fri, 21 Oct 2022 09:55:37 -0700 (PDT) Received: from eriador.unikie.fi ([192.130.178.91]) by smtp.gmail.com with ESMTPSA id x4-20020a056512078400b004946e72711bsm3218532lfr.76.2022.10.21.09.55.36 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Fri, 21 Oct 2022 09:55:37 -0700 (PDT) From: Dmitry Baryshkov To: Will Deacon , Robin Murphy , Joerg Roedel , Rob Herring , Krzysztof Kozlowski , Bjorn Andersson , Konrad Dybcio , Rob Clark Cc: Vinod Koul , Sai Prakash Ranjan , linux-arm-kernel@lists.infradead.org, linux-arm-msm@vger.kernel.org, iommu@lists.linux.dev, devicetree@vger.kernel.org, freedreno@lists.freedesktop.org Subject: [RFC PATCH 3/9] dt-bindings: arm-smmu: Add generic qcom,smmu-500 bindings Date: Fri, 21 Oct 2022 19:55:28 +0300 Message-Id: <20221021165534.2334329-4-dmitry.baryshkov@linaro.org> X-Mailer: git-send-email 2.35.1 In-Reply-To: <20221021165534.2334329-1-dmitry.baryshkov@linaro.org> References: <20221021165534.2334329-1-dmitry.baryshkov@linaro.org> MIME-Version: 1.0 Precedence: bulk List-ID: X-Mailing-List: devicetree@vger.kernel.org Add generic bindings for the Qualcomm variant of the ARM MMU-500. It is expected that all future platforms will use the generic qcom,smmu-500 compat string in addition to SoC-specific and the generic arm,mmu-500 ones. Older bindings are now described as deprecated. Note: I have split the sdx55 and sdx65 from the legacy bindings. They are not supported by the qcom SMMU implementation. I can suppose that they are using the generic implementation rather than the Qualcomm-speicific one. Signed-off-by: Dmitry Baryshkov Reviewed-by: Krzysztof Kozlowski --- .../devicetree/bindings/iommu/arm,smmu.yaml | 28 ++++++++++++++++++- 1 file changed, 27 insertions(+), 1 deletion(-) diff --git a/Documentation/devicetree/bindings/iommu/arm,smmu.yaml b/Documentation/devicetree/bindings/iommu/arm,smmu.yaml index bae9fb3ffadb..796dc7d4dbdd 100644 --- a/Documentation/devicetree/bindings/iommu/arm,smmu.yaml +++ b/Documentation/devicetree/bindings/iommu/arm,smmu.yaml @@ -31,7 +31,7 @@ properties: - qcom,sdm630-smmu-v2 - const: qcom,smmu-v2 - - description: Qcom SoCs implementing "arm,mmu-500" + - description: Qcom SoCs implementing "qcom,smmu-500" and "arm,mmu-500" items: - enum: - qcom,qcm2290-smmu-500 @@ -40,8 +40,34 @@ properties: - qcom,sc8180x-smmu-500 - qcom,sc8280xp-smmu-500 - qcom,sdm845-smmu-500 + - qcom,sm6350-smmu-500 + - qcom,sm6375-smmu-500 + - qcom,sm8150-smmu-500 + - qcom,sm8250-smmu-500 + - qcom,sm8350-smmu-500 + - qcom,sm8450-smmu-500 + - const: qcom,smmu-500 + - const: arm,mmu-500 + + - description: Qcom SoCs implementing "arm,mmu-500" (non-qcom implementation) + deprecated: true + items: + - enum: - qcom,sdx55-smmu-500 - qcom,sdx65-smmu-500 + - const: arm,mmu-500 + + - description: Qcom SoCs implementing "arm,mmu-500" (legacy binding) + deprecated: true + items: + # Do not add additional SoC to this list. Instead use two previous lists. + - enum: + - qcom,qcm2290-smmu-500 + - qcom,sc7180-smmu-500 + - qcom,sc7280-smmu-500 + - qcom,sc8180x-smmu-500 + - qcom,sc8280xp-smmu-500 + - qcom,sdm845-smmu-500 - qcom,sm6350-smmu-500 - qcom,sm6375-smmu-500 - qcom,sm8150-smmu-500