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[v1,1/3] dt-bindings: RNG: Add Rockchip RNG bindings

Message ID 20221112141059.3802506-2-aurelien@aurel32.net
State New
Headers show
Series [v1,1/3] dt-bindings: RNG: Add Rockchip RNG bindings | expand

Commit Message

Aurelien Jarno Nov. 12, 2022, 2:10 p.m. UTC 
Add the RNG bindings for the RK3568 SoC from Rockchip

Signed-off-by: Aurelien Jarno <aurelien@aurel32.net>
---
 .../devicetree/bindings/rng/rockchip-rng.yaml | 62 +++++++++++++++++++
 1 file changed, 62 insertions(+)
 create mode 100644 Documentation/devicetree/bindings/rng/rockchip-rng.yaml
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Patch

diff --git a/Documentation/devicetree/bindings/rng/rockchip-rng.yaml b/Documentation/devicetree/bindings/rng/rockchip-rng.yaml
new file mode 100644
index 000000000000..87d80e8ff7f2
--- /dev/null
+++ b/Documentation/devicetree/bindings/rng/rockchip-rng.yaml
@@ -0,0 +1,62 @@ 
+# SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)
+%YAML 1.2
+---
+$id: http://devicetree.org/schemas/rng/rockchip,rk-rng.yaml#
+$schema: http://devicetree.org/meta-schemas/core.yaml#
+
+title: Rockchip TRNG bindings
+
+description:
+  This driver interface with the True Random Number Generator present in some
+  Rockchip SoCs.
+
+maintainers:
+  - Aurelien Jarno <aurelien@aurel32.net>
+
+properties:
+  compatible:
+    oneOf:
+      - const: rockchip,rk3568-rng
+
+  reg:
+    maxItems: 1
+
+  clocks:
+    minItems: 2
+    maxItems: 2
+
+  clock-names:
+    items:
+      - const: clk
+      - const: hclk
+
+  resets:
+    maxItems: 1
+
+  reset-names:
+    items:
+      - const: reset
+
+required:
+  - compatible
+  - reg
+  - clocks
+  - clock-names
+  - resets
+  - reset-names
+
+additionalProperties: false
+
+examples:
+  - |
+    #include <dt-bindings/clock/rk3568-cru.h>
+    rng@fe388000 {
+      compatible = "rockchip,rk3568-rng";
+      reg = <0x0 0xfe388000 0x0 0x4000>;
+      clocks = <&cru CLK_TRNG_NS>, <&cru HCLK_TRNG_NS>;
+      clock-names = "trng_clk", "trng_hclk";
+      resets = <&cru SRST_TRNG_NS>;
+      reset-names = "reset";
+    };
+
+...