From patchwork Thu Feb 16 12:00:12 2023 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Poovendhan Selvaraj X-Patchwork-Id: 654232 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org Received: from vger.kernel.org (vger.kernel.org [23.128.96.18]) by smtp.lore.kernel.org (Postfix) with ESMTP id 6810DC636D6 for ; Thu, 16 Feb 2023 12:02:00 +0000 (UTC) Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S230301AbjBPMB6 (ORCPT ); Thu, 16 Feb 2023 07:01:58 -0500 Received: from lindbergh.monkeyblade.net ([23.128.96.19]:46154 "EHLO lindbergh.monkeyblade.net" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S230303AbjBPMBj (ORCPT ); Thu, 16 Feb 2023 07:01:39 -0500 Received: from mx0b-0031df01.pphosted.com (mx0b-0031df01.pphosted.com [205.220.180.131]) by lindbergh.monkeyblade.net (Postfix) with ESMTPS id 5DB3753575; Thu, 16 Feb 2023 04:01:36 -0800 (PST) Received: from pps.filterd (m0279869.ppops.net [127.0.0.1]) by mx0a-0031df01.pphosted.com (8.17.1.19/8.17.1.19) with ESMTP id 31G50i77028938; Thu, 16 Feb 2023 12:01:23 GMT DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=quicinc.com; h=from : to : cc : subject : date : message-id : in-reply-to : references : mime-version : content-type; s=qcppdkim1; bh=opMcAMDYXE/o6hcfbgMpGersLTG+F14oWJ+ziWyzw9M=; b=ElaANO0QYtIsS3r+TVIyPq8Z+ihePFPros8UvWNX61C9QXnErxakhodUYb8Bc350Khh+ x6eAVQiKj9mCTxhUEHrFAa5LKCvATaOy8fOXu7Pf2j6MBiJdClwE5yoUqP1AP28w4PK3 OSP24/Scp8qfY5rnOW5hq+5UfJMdOphESJtpIk3ayq6JJq+AyGKRj6XaLltJXXwDxtCG ji1tk6TsCuExk+sH5affoEbNBXnlO6P6qLZgGdN+deeOgyLPPAjn/7WgHkdt2PMxfG8/ 7gZoYAKs+CFsACuXqPVsmue5QEWDeQgjWHZYHRvKuU2hNiRMsd0OH72JmYIt66MRVXyg bA== Received: from nalasppmta02.qualcomm.com (Global_NAT1.qualcomm.com [129.46.96.20]) by mx0a-0031df01.pphosted.com (PPS) with ESMTPS id 3nrwckbdf1-1 (version=TLSv1.2 cipher=ECDHE-RSA-AES256-GCM-SHA384 bits=256 verify=NOT); Thu, 16 Feb 2023 12:01:23 +0000 Received: from nalasex01a.na.qualcomm.com (nalasex01a.na.qualcomm.com [10.47.209.196]) by NALASPPMTA02.qualcomm.com (8.17.1.5/8.17.1.5) with ESMTPS id 31GC1MSE030157 (version=TLSv1.2 cipher=ECDHE-RSA-AES256-GCM-SHA384 bits=256 verify=NOT); Thu, 16 Feb 2023 12:01:22 GMT Received: from poovendh-linux.qualcomm.com (10.80.80.8) by nalasex01a.na.qualcomm.com (10.47.209.196) with Microsoft SMTP Server (version=TLS1_2, cipher=TLS_ECDHE_RSA_WITH_AES_256_GCM_SHA384) id 15.2.986.41; Thu, 16 Feb 2023 04:01:13 -0800 From: Poovendhan Selvaraj To: , , , , , , , , , , , , , , , , , , , CC: , , , , , , Subject: [PATCH V5 5/5] firmware: scm: Modify only the DLOAD bit in TCSR register for download mode Date: Thu, 16 Feb 2023 17:30:12 +0530 Message-ID: <20230216120012.28357-6-quic_poovendh@quicinc.com> X-Mailer: git-send-email 2.17.1 In-Reply-To: <20230216120012.28357-1-quic_poovendh@quicinc.com> References: <20230216120012.28357-1-quic_poovendh@quicinc.com> MIME-Version: 1.0 X-Originating-IP: [10.80.80.8] X-ClientProxiedBy: nasanex01b.na.qualcomm.com (10.46.141.250) To nalasex01a.na.qualcomm.com (10.47.209.196) X-QCInternal: smtphost X-Proofpoint-Virus-Version: vendor=nai engine=6200 definitions=5800 signatures=585085 X-Proofpoint-GUID: -mdhW_9KDe4hvwefKfGFBerxm3NEfgtX X-Proofpoint-ORIG-GUID: -mdhW_9KDe4hvwefKfGFBerxm3NEfgtX X-Proofpoint-Virus-Version: vendor=baseguard engine=ICAP:2.0.219,Aquarius:18.0.930,Hydra:6.0.562,FMLib:17.11.170.22 definitions=2023-02-16_08,2023-02-16_01,2023-02-09_01 X-Proofpoint-Spam-Details: rule=outbound_notspam policy=outbound score=0 malwarescore=0 priorityscore=1501 bulkscore=0 phishscore=0 mlxlogscore=999 clxscore=1015 impostorscore=0 suspectscore=0 spamscore=0 lowpriorityscore=0 adultscore=0 mlxscore=0 classifier=spam adjust=0 reason=mlx scancount=1 engine=8.12.0-2212070000 definitions=main-2302160102 Precedence: bulk List-ID: X-Mailing-List: devicetree@vger.kernel.org CrashDump collection is based on the DLOAD bit of TCSR register. To retain other bits, we read the register and modify only the DLOAD bit as the other bits have their own significance. Co-developed-by: Anusha Rao Signed-off-by: Anusha Rao Co-developed-by: Kathiravan Thirumoorthy Signed-off-by: Kathiravan Thirumoorthy Signed-off-by: Poovendhan Selvaraj --- Changes in V5: - checking the return value in qcom_scm_set_download_mode function as suggested by Srinivas Kandagatla Changes in V4: - retain the orginal value of tcsr register when download mode is not set drivers/firmware/qcom_scm.c | 21 ++++++++++++++++----- 1 file changed, 16 insertions(+), 5 deletions(-) diff --git a/drivers/firmware/qcom_scm.c b/drivers/firmware/qcom_scm.c index 468d4d5ab550..d88c5f14bd54 100644 --- a/drivers/firmware/qcom_scm.c +++ b/drivers/firmware/qcom_scm.c @@ -407,7 +407,7 @@ int qcom_scm_set_remote_state(u32 state, u32 id) } EXPORT_SYMBOL(qcom_scm_set_remote_state); -static int __qcom_scm_set_dload_mode(struct device *dev, bool enable) +static int __qcom_scm_set_dload_mode(struct device *dev, u32 val, bool enable) { struct qcom_scm_desc desc = { .svc = QCOM_SCM_SVC_BOOT, @@ -417,7 +417,8 @@ static int __qcom_scm_set_dload_mode(struct device *dev, bool enable) .owner = ARM_SMCCC_OWNER_SIP, }; - desc.args[1] = enable ? QCOM_SCM_BOOT_SET_DLOAD_MODE : 0; + desc.args[1] = enable ? val | QCOM_SCM_BOOT_SET_DLOAD_MODE : + val & ~(QCOM_SCM_BOOT_SET_DLOAD_MODE); return qcom_scm_call_atomic(__scm->dev, &desc, NULL); } @@ -426,15 +427,25 @@ static void qcom_scm_set_download_mode(bool enable) { bool avail; int ret = 0; + u32 dload_addr_val; avail = __qcom_scm_is_call_available(__scm->dev, QCOM_SCM_SVC_BOOT, QCOM_SCM_BOOT_SET_DLOAD_MODE); + ret = qcom_scm_io_readl(__scm->dload_mode_addr, &dload_addr_val); + + if (ret) { + dev_err(__scm->dev, + "failed to read dload mode address value: %d\n", ret); + return; + } + if (avail) { - ret = __qcom_scm_set_dload_mode(__scm->dev, enable); + ret = __qcom_scm_set_dload_mode(__scm->dev, dload_addr_val, enable); } else if (__scm->dload_mode_addr) { - ret = qcom_scm_io_writel(__scm->dload_mode_addr, - enable ? QCOM_SCM_BOOT_SET_DLOAD_MODE : 0); + ret = qcom_scm_io_writel(__scm->dload_mode_addr, enable ? + dload_addr_val | QCOM_SCM_BOOT_SET_DLOAD_MODE : + dload_addr_val & ~(QCOM_SCM_BOOT_SET_DLOAD_MODE)); } else { dev_err(__scm->dev, "No available mechanism for setting download mode\n");