From patchwork Mon Mar 6 15:32:13 2023 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Manivannan Sadhasivam X-Patchwork-Id: 659500 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org Received: from vger.kernel.org (vger.kernel.org [23.128.96.18]) by smtp.lore.kernel.org (Postfix) with ESMTP id 20EC7C6FD1B for ; Mon, 6 Mar 2023 15:34:23 +0000 (UTC) Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S231174AbjCFPeV (ORCPT ); Mon, 6 Mar 2023 10:34:21 -0500 Received: from lindbergh.monkeyblade.net ([23.128.96.19]:60772 "EHLO lindbergh.monkeyblade.net" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S230356AbjCFPeI (ORCPT ); Mon, 6 Mar 2023 10:34:08 -0500 Received: from mail-pj1-x102f.google.com (mail-pj1-x102f.google.com [IPv6:2607:f8b0:4864:20::102f]) by lindbergh.monkeyblade.net (Postfix) with ESMTPS id D8FAD1BE for ; Mon, 6 Mar 2023 07:33:27 -0800 (PST) Received: by mail-pj1-x102f.google.com with SMTP id y15-20020a17090aa40f00b00237ad8ee3a0so9169187pjp.2 for ; Mon, 06 Mar 2023 07:33:27 -0800 (PST) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=linaro.org; s=google; t=1678116800; h=content-transfer-encoding:mime-version:references:in-reply-to :message-id:date:subject:cc:to:from:from:to:cc:subject:date :message-id:reply-to; bh=KBoZXs7oWaG22XZASLiUsiWHjHyRIoI/eDEhjgIXc7Q=; b=UVA9L/s90wCetrJd7EWLPjzEaKsVJA4hZV1B6VwH1cVGOOM4qO6ZOJTilvRuvM5Dvn 9QDcLqQ58ey26VH4oZ2hVAdJ4GYglmq0Jho9P6jM8E7eR2VHRFBBbW7hiJiJ0EWr4oTQ iqYyNnYUNGWNCdnxKwQtrqtmvma2w8tqVov87jFgv2KaJemrao85uCP9CKRNenJzi4xO 2Oi0wb+T1gj+tnuUkz15KaqDac6cV9rHfgeYJ9InmGgcC1jFN7P3bF5ZgCEmCITnln9v CCOPROPJ1RmOerq95hMKAhFiV5zFXMkIs8qGMMWhWaY5RXThtV5eQQfKXFAXfEkE3iM7 xbbQ== X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=1e100.net; s=20210112; t=1678116800; h=content-transfer-encoding:mime-version:references:in-reply-to :message-id:date:subject:cc:to:from:x-gm-message-state:from:to:cc :subject:date:message-id:reply-to; bh=KBoZXs7oWaG22XZASLiUsiWHjHyRIoI/eDEhjgIXc7Q=; b=CqGPDyl05WEasNwtPmpoC1sbGU1tHoSlUYdYc7Dtro5w2Vq5PyJjzbEP94NR5CZtmo X81jPe9tdHs/rFwyG5Lh8+ZsRRrt7eWzxjcvY0YcDUMKYO22WPQt0mGl1+qea/J//SWz V3buI33SS0+K24e3wgVJ+MRglHvCaJRE1IzmgmjouKGG2Vq3Ypp5uWvHWqJpKrYhMoJc 2DV56HvMWgVaLQvxa/yaNnDTJFEfv4UFOWj9NugzmxQzqP0breIbMAkYS226FAR99Tw/ RY4fIA3+/dAZbL5kS+R119LqmFwgsnnoJRL2I77VwNDXUYp5G1jXs4qbyxlVdL38IDgC ahJA== X-Gm-Message-State: AO0yUKXNa4vCkRgUa3nhbf7drDAqI8NQeDn8A5ITdOehNmV2Tqx61hQv l7PF+KbznqF0azQ1VweSymlu X-Google-Smtp-Source: AK7set+hzSZX+ORf5IOG1kTrSNfNx3PyXjEdR0admtfuyQIsPjVgZeIfb9D2Ich8EGvBE+brpqN0dA== X-Received: by 2002:a17:902:e542:b0:19b:78:539e with SMTP id n2-20020a170902e54200b0019b0078539emr14724926plf.68.1678116800657; Mon, 06 Mar 2023 07:33:20 -0800 (PST) Received: from localhost.localdomain ([59.97.52.140]) by smtp.gmail.com with ESMTPSA id kl4-20020a170903074400b0019a7c890c61sm6837430plb.252.2023.03.06.07.33.16 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Mon, 06 Mar 2023 07:33:20 -0800 (PST) From: Manivannan Sadhasivam To: andersson@kernel.org, lpieralisi@kernel.org, kw@linux.com, krzysztof.kozlowski+dt@linaro.org, robh@kernel.org Cc: konrad.dybcio@linaro.org, linux-arm-msm@vger.kernel.org, devicetree@vger.kernel.org, linux-pci@vger.kernel.org, linux-kernel@vger.kernel.org, quic_srichara@quicinc.com, Manivannan Sadhasivam Subject: [PATCH 10/19] PCI: qcom: Use bulk reset APIs for handling resets for IP rev 2.3.3 Date: Mon, 6 Mar 2023 21:02:13 +0530 Message-Id: <20230306153222.157667-11-manivannan.sadhasivam@linaro.org> X-Mailer: git-send-email 2.25.1 In-Reply-To: <20230306153222.157667-1-manivannan.sadhasivam@linaro.org> References: <20230306153222.157667-1-manivannan.sadhasivam@linaro.org> MIME-Version: 1.0 Precedence: bulk List-ID: X-Mailing-List: devicetree@vger.kernel.org All the resets are asserted and deasserted at the same time. So the bulk reset APIs can be used to handle them together. This simplifies the code a lot. Signed-off-by: Manivannan Sadhasivam --- drivers/pci/controller/dwc/pcie-qcom.c | 49 ++++++++++++-------------- 1 file changed, 23 insertions(+), 26 deletions(-) diff --git a/drivers/pci/controller/dwc/pcie-qcom.c b/drivers/pci/controller/dwc/pcie-qcom.c index 6b83e3627336..8c39fc554a89 100644 --- a/drivers/pci/controller/dwc/pcie-qcom.c +++ b/drivers/pci/controller/dwc/pcie-qcom.c @@ -170,9 +170,10 @@ struct qcom_pcie_resources_2_3_2 { }; #define QCOM_PCIE_2_3_3_MAX_CLOCKS 5 +#define QCOM_PCIE_2_3_3_MAX_RESETS 7 struct qcom_pcie_resources_2_3_3 { struct clk_bulk_data clks[QCOM_PCIE_2_3_3_MAX_CLOCKS]; - struct reset_control *rst[7]; + struct reset_control_bulk_data rst[QCOM_PCIE_2_3_3_MAX_RESETS]; }; #define QCOM_PCIE_2_4_0_MAX_CLOCKS 4 @@ -889,10 +890,6 @@ static int qcom_pcie_get_resources_2_3_3(struct qcom_pcie *pcie) struct qcom_pcie_resources_2_3_3 *res = &pcie->res.v2_3_3; struct dw_pcie *pci = pcie->pci; struct device *dev = pci->dev; - int i; - const char *rst_names[] = { "axi_m", "axi_s", "pipe", - "axi_m_sticky", "sticky", - "ahb", "sleep", }; int ret; res->clks[0].id = "iface"; @@ -905,11 +902,17 @@ static int qcom_pcie_get_resources_2_3_3(struct qcom_pcie *pcie) if (ret < 0) return ret; - for (i = 0; i < ARRAY_SIZE(rst_names); i++) { - res->rst[i] = devm_reset_control_get(dev, rst_names[i]); - if (IS_ERR(res->rst[i])) - return PTR_ERR(res->rst[i]); - } + res->rst[0].id = "axi_m"; + res->rst[1].id = "axi_s"; + res->rst[2].id = "pipe"; + res->rst[3].id = "axi_m_sticky"; + res->rst[4].id = "sticky"; + res->rst[5].id = "ahb"; + res->rst[6].id = "sleep"; + + ret = devm_reset_control_bulk_get_exclusive(dev, ARRAY_SIZE(res->rst), res->rst); + if (ret < 0) + return ret; return 0; } @@ -926,25 +929,20 @@ static int qcom_pcie_init_2_3_3(struct qcom_pcie *pcie) struct qcom_pcie_resources_2_3_3 *res = &pcie->res.v2_3_3; struct dw_pcie *pci = pcie->pci; struct device *dev = pci->dev; - int i, ret; + int ret; - for (i = 0; i < ARRAY_SIZE(res->rst); i++) { - ret = reset_control_assert(res->rst[i]); - if (ret) { - dev_err(dev, "reset #%d assert failed (%d)\n", i, ret); - return ret; - } + ret = reset_control_bulk_assert(ARRAY_SIZE(res->rst), res->rst); + if (ret < 0) { + dev_err(dev, "cannot assert resets\n"); + return ret; } usleep_range(2000, 2500); - for (i = 0; i < ARRAY_SIZE(res->rst); i++) { - ret = reset_control_deassert(res->rst[i]); - if (ret) { - dev_err(dev, "reset #%d deassert failed (%d)\n", i, - ret); - return ret; - } + ret = reset_control_bulk_deassert(ARRAY_SIZE(res->rst), res->rst); + if (ret < 0) { + dev_err(dev, "cannot deassert resets\n"); + return ret; } /* @@ -966,8 +964,7 @@ static int qcom_pcie_init_2_3_3(struct qcom_pcie *pcie) * Not checking for failure, will anyway return * the original failure in 'ret'. */ - for (i = 0; i < ARRAY_SIZE(res->rst); i++) - reset_control_assert(res->rst[i]); + reset_control_bulk_assert(ARRAY_SIZE(res->rst), res->rst); return ret; }