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[83.9.29.16]) by smtp.gmail.com with ESMTPSA id u28-20020ac243dc000000b004db2978e330sm1194222lfl.258.2023.03.16.04.17.13 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Thu, 16 Mar 2023 04:17:14 -0700 (PDT) From: Konrad Dybcio Date: Thu, 16 Mar 2023 12:17:00 +0100 Subject: [PATCH 5/5] arm64: dts: qcom: sm6350: Fix ZAP region MIME-Version: 1.0 Message-Id: <20230315-topic-lagoon_gpu-v1-5-a74cbec4ecfc@linaro.org> References: <20230315-topic-lagoon_gpu-v1-0-a74cbec4ecfc@linaro.org> In-Reply-To: <20230315-topic-lagoon_gpu-v1-0-a74cbec4ecfc@linaro.org> To: Bjorn Andersson , Andy Gross , Michael Turquette , Stephen Boyd , Rob Herring , Krzysztof Kozlowski , AngeloGioacchino Del Regno Cc: Marijn Suijten , Rob Herring , linux-arm-msm@vger.kernel.org, linux-clk@vger.kernel.org, devicetree@vger.kernel.org, linux-kernel@vger.kernel.org, Konrad Dybcio , Konrad Dybcio X-Mailer: b4 0.12.1 X-Developer-Signature: v=1; a=ed25519-sha256; t=1678965426; l=1198; i=konrad.dybcio@linaro.org; s=20230215; h=from:subject:message-id; bh=U/Bw3E38fEF8jRRzaXOryssKT6fka2DSqTWTV4ocpSA=; b=FZq6+bZWyPDPG79SPJXQgWMUALXc7JoCk5eDIYdobDAZMVCQOw9q8wZUWV8Udto2y4Yyubxykc6P 3HZ83basBb+Ua3BceNy+jApWcW2cEL/Tux1dLECNslyXJL3tGFGU X-Developer-Key: i=konrad.dybcio@linaro.org; a=ed25519; pk=iclgkYvtl2w05SSXO5EjjSYlhFKsJ+5OSZBjOkQuEms= Precedence: bulk List-ID: X-Mailing-List: devicetree@vger.kernel.org From: Konrad Dybcio The previous ZAP region definition was wrong. Fix it. Note this is not a device-specific fixup, but a fixup to the generic PIL load address. Fixes: 5f82b9cda61e ("arm64: dts: qcom: Add SM6350 device tree") Signed-off-by: Konrad Dybcio Signed-off-by: Konrad Dybcio --- arch/arm64/boot/dts/qcom/sm6350.dtsi | 10 +++++----- 1 file changed, 5 insertions(+), 5 deletions(-) diff --git a/arch/arm64/boot/dts/qcom/sm6350.dtsi b/arch/arm64/boot/dts/qcom/sm6350.dtsi index e967d06b0ad4..3fe4a5fa3021 100644 --- a/arch/arm64/boot/dts/qcom/sm6350.dtsi +++ b/arch/arm64/boot/dts/qcom/sm6350.dtsi @@ -466,11 +466,6 @@ pil_ipa_gsi_mem: memory@8b710000 { no-map; }; - pil_gpu_mem: memory@8b715400 { - reg = <0 0x8b715400 0 0x2000>; - no-map; - }; - pil_modem_mem: memory@8b800000 { reg = <0 0x8b800000 0 0xf800000>; no-map; @@ -491,6 +486,11 @@ removed_region: memory@c0000000 { no-map; }; + pil_gpu_mem: memory@f0d00000 { + reg = <0 0xf0d00000 0 0x1000>; + no-map; + }; + debug_region: memory@ffb00000 { reg = <0 0xffb00000 0 0xc0000>; no-map;