From patchwork Wed Mar 29 14:29:46 2023 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Esteban Blanc X-Patchwork-Id: 668357 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org Received: from vger.kernel.org (vger.kernel.org [23.128.96.18]) by smtp.lore.kernel.org (Postfix) with ESMTP id DD4ABC77B61 for ; Wed, 29 Mar 2023 14:35:38 +0000 (UTC) Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S230511AbjC2Ofh (ORCPT ); Wed, 29 Mar 2023 10:35:37 -0400 Received: from lindbergh.monkeyblade.net ([23.128.96.19]:56626 "EHLO lindbergh.monkeyblade.net" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S229916AbjC2OfI (ORCPT ); Wed, 29 Mar 2023 10:35:08 -0400 Received: from mail-wr1-x42d.google.com (mail-wr1-x42d.google.com [IPv6:2a00:1450:4864:20::42d]) by lindbergh.monkeyblade.net (Postfix) with ESMTPS id 9996FBBB2 for ; Wed, 29 Mar 2023 07:31:23 -0700 (PDT) Received: by mail-wr1-x42d.google.com with SMTP id t4so10721734wra.7 for ; Wed, 29 Mar 2023 07:31:23 -0700 (PDT) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=baylibre-com.20210112.gappssmtp.com; s=20210112; t=1680100192; h=content-transfer-encoding:mime-version:references:in-reply-to :message-id:date:subject:cc:to:from:from:to:cc:subject:date :message-id:reply-to; bh=R9FP8yTKlLn+78EFbORAACf5tMBytVHlUrsTqb871yI=; b=sxaCR9L44CY0OTC02bRl5Fc2yhrdkNSMVOSk2QIKJt1r9AjUCNAtrHoB+zyDmWnZcF SAwdmLtQ6H0kneg6epSJ3bXIn9NjFrJrfRSPY0bXCiHLqGbzb6qD7aYwlUWci1E9DKT9 3gFQKTuBTEX3yXuAAPT1pkKFwZKsK37U5QZ5zk/BPzgEVqOt2CnDnPs3iXgphSpRtEtM CdOl2CvvxPZuL57bph5JSOm7Ljg+mjiLjMeCt1VSquico2WwAxkOAbsV4IJXbVCFsbkf cdJJt0w/3+tCfLzRU1U5gUB/bXvCMZ5KfkIjYvFD/Qga6Z6Zt2Be7gUYLDCU8gHRR6Yo Y8ow== X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=1e100.net; s=20210112; t=1680100192; h=content-transfer-encoding:mime-version:references:in-reply-to :message-id:date:subject:cc:to:from:x-gm-message-state:from:to:cc :subject:date:message-id:reply-to; bh=R9FP8yTKlLn+78EFbORAACf5tMBytVHlUrsTqb871yI=; b=wnIDE6oYj0Ok/4FgwzbZqVqjmztHDZnXj5fjojv9u96WvyjtVZh1YH5otC3u5xNK9d ODYpvN5OYNvTRR7VfU2xFXcAXmIVM8Gg5w5ZxGklR2qomR8cR23DG/YYPdbhumnDXLmP MDX8loY/h2HHYLi9TRs4sTxbQunFNb3MZXcZQUNWD90zhwkV/J2hVEfw3hdoKNc1AolZ 3Ac08oeVUogNZ6xzhK57QfUWz8f+nQGv9C8yVLDcRz0pQXRICSAOcMf6M7YgwEEowLaW 6DlKp9XKD/jyLWJdCXNt2s7MSbZ6mUbOCASLBuwJu2dZ1y9dFrJCvQTtNKV/uIa0X1b9 wpiw== X-Gm-Message-State: AAQBX9cihlyBTKFEBOuGGya9j4hCLYNhWw7dL7qFvr726tIoKlliRnoe feeSs7Q9ViDwY2VipKfA2pAQzQ== X-Google-Smtp-Source: AKy350aPVrDRUFshsXr58rxVvQSaVL/nwX4HRFEBtky+Xxu6ustUEsVcaNljLRfSodKixu2Hjsimbw== X-Received: by 2002:adf:decf:0:b0:2ce:a8f9:7cae with SMTP id i15-20020adfdecf000000b002cea8f97caemr14802435wrn.53.1680100192674; Wed, 29 Mar 2023 07:29:52 -0700 (PDT) Received: from localhost.localdomain ([2a01:e0a:28d:66d0:7049:3791:78c8:6c3]) by smtp.gmail.com with ESMTPSA id b9-20020adfde09000000b002daeb108304sm17270792wrm.33.2023.03.29.07.29.51 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Wed, 29 Mar 2023 07:29:52 -0700 (PDT) From: Esteban Blanc To: nm@ti.com, vigneshr@ti.com, kristo@kernel.org, robh+dt@kernel.org, krzysztof.kozlowski+dt@linaro.org Cc: linux-arm-kernel@lists.infradead.org, devicetree@vger.kernel.org, linux-kernel@vger.kernel.org, sterzik@ti.com, u-kumar1@ti.com, eblanc@baylibre.com, jneanne@baylibre.com, jpanis@baylibre.com Subject: [PATCH v1 2/4] arm64: dts: ti: k3-j721s2-som-p0: Add TP6594 family PMICs Date: Wed, 29 Mar 2023 16:29:46 +0200 Message-Id: <20230329142948.833800-3-eblanc@baylibre.com> X-Mailer: git-send-email 2.39.2 In-Reply-To: <20230329142948.833800-1-eblanc@baylibre.com> References: <20230329142948.833800-1-eblanc@baylibre.com> MIME-Version: 1.0 Precedence: bulk List-ID: X-Mailing-List: devicetree@vger.kernel.org This patch adds support for TPS6594 PMIC family on wakup I2C0 bus. Theses devices provides regulators (bucks and LDOs), but also GPIOs, a RTC, a watchdog, an ESM (Error Signal Monitor) which monitors the SoC error output signal, and a PFSM (Pre-configurable Finite State Machine) which manages the operational modes of the PMIC. Signed-off-by: Esteban Blanc --- arch/arm64/boot/dts/ti/k3-j721s2-som-p0.dtsi | 208 +++++++++++++++++++ 1 file changed, 208 insertions(+) diff --git a/arch/arm64/boot/dts/ti/k3-j721s2-som-p0.dtsi b/arch/arm64/boot/dts/ti/k3-j721s2-som-p0.dtsi index 6930efff8a5a..d7653c15d9a6 100644 --- a/arch/arm64/boot/dts/ti/k3-j721s2-som-p0.dtsi +++ b/arch/arm64/boot/dts/ti/k3-j721s2-som-p0.dtsi @@ -79,3 +79,211 @@ &main_mcan16 { pinctrl-names = "default"; phys = <&transceiver0>; }; + +&wkup_pmx0 { + pmic_irq_pins_default: pmic-irq-pins-default { + pinctrl-single,pins = < + /* (C21) MCU_OSPI1_CSn1.WKUP_GPIO0_39 */ + J721S2_WKUP_IOPAD(0x060, PIN_INPUT, 7) + >; + }; + + wkup_i2c0_pins_default: wkup_i2c0_pins_default { + pinctrl-single,pins = < + J721S2_WKUP_IOPAD(0x100, PIN_INPUT, 0) /* (H24) WKUP_I2C0_SCL */ + J721S2_WKUP_IOPAD(0x104, PIN_INPUT, 0) /* (H27) WKUP_I2C0_SDA */ + >; + }; +}; + +&wkup_i2c0 { + status = "okay"; + pinctrl-names = "default"; + pinctrl-0 = <&wkup_i2c0_pins_default>; + clock-frequency = <400000>; + + tps659411: tps659411@48 { + compatible = "ti,tps6594"; + reg = <0x48>; + ti,primary-pmic; + system-power-controller; + + pinctrl-names = "default"; + pinctrl-0 = <&pmic_irq_pins_default>; + interrupt-parent = <&wkup_gpio0>; + interrupts = <39 IRQ_TYPE_EDGE_FALLING>; + + ti,multi-phase-id = <1234>; + + buck1234-supply = <&vsys_3v3>; + buck5-supply = <&vsys_3v3>; + ldo1-supply = <&vsys_3v3>; + ldo2-supply = <&vsys_3v3>; + ldo3-supply = <&vsys_3v3>; + ldo4-supply = <&vsys_3v3>; + + regulators { + bucka1234_reg: buck1234 { + regulator-name = "vdd_cpu_avs"; + regulator-min-microvolt = <300000>; + regulator-max-microvolt = <1050000>; + regulator-boot-on; + regulator-always-on; + }; + + bucka5_reg: buck5 { + regulator-name = "vdd_mcu_0v85"; + regulator-min-microvolt = <850000>; + regulator-max-microvolt = <850000>; + regulator-boot-on; + regulator-always-on; + }; + + ldoa1_reg: ldo1 { + regulator-name = "vdd_mcuwk_0v8"; + regulator-min-microvolt = <800000>; + regulator-max-microvolt = <800000>; + regulator-boot-on; + regulator-always-on; + }; + + ldoa2_reg: ldo2 { + regulator-name = "vdd_mcu_gpioret_3v3"; + regulator-min-microvolt = <3300000>; + regulator-max-microvolt = <3300000>; + regulator-boot-on; + regulator-always-on; + }; + + ldoa3_reg: ldo3 { + regulator-name = "vdd_mcuio_1v8"; + regulator-min-microvolt = <1800000>; + regulator-max-microvolt = <1800000>; + regulator-boot-on; + regulator-always-on; + }; + + ldoa4_reg: ldo4 { + regulator-name = "vda_mcu_1v8"; + regulator-min-microvolt = <1800000>; + regulator-max-microvolt = <1800000>; + regulator-boot-on; + regulator-always-on; + }; + }; + }; + + tps659414: tps659414@4c { + compatible = "ti,tps6594"; + reg = <0x4c>; + system-power-controller; + interrupt-parent = <&wkup_gpio0>; + interrupts = <39 IRQ_TYPE_EDGE_FALLING>; + + buck1-supply = <&vsys_3v3>; + buck2-supply = <&vsys_3v3>; + buck3-supply = <&vsys_3v3>; + buck4-supply = <&vsys_3v3>; + buck5-supply = <&vsys_3v3>; + ldo1-supply = <&vsys_3v3>; + ldo2-supply = <&vsys_3v3>; + ldo3-supply = <&vsys_3v3>; + ldo4-supply = <&vsys_3v3>; + + regulators { + buckb1_reg: buck1 { + regulator-name = "vdd_io_1v8_reg"; + regulator-min-microvolt = <1800000>; + regulator-max-microvolt = <1800000>; + regulator-always-on; + regulator-boot-on; + }; + + buckb2_reg: buck2 { + regulator-name = "vdd_fpd_1v1"; + regulator-min-microvolt = <1100000>; + regulator-max-microvolt = <1100000>; + regulator-boot-on; + regulator-always-on; + }; + + buckb3_reg: buck3 { + regulator-name = "vdd_phy_1v8"; + regulator-min-microvolt = <1800000>; + regulator-max-microvolt = <1800000>; + regulator-boot-on; + regulator-always-on; + }; + + buckb4_reg: buck4 { + regulator-name = "vdd_ddr_1v1"; + regulator-min-microvolt = <1100000>; + regulator-max-microvolt = <1100000>; + regulator-boot-on; + regulator-always-on; + }; + + buckb5_reg: buck5 { + regulator-name = "vdd_ram_0v85"; + regulator-min-microvolt = <850000>; + regulator-max-microvolt = <850000>; + regulator-boot-on; + regulator-always-on; + }; + + ldob1_reg: ldo1 { + regulator-name = "vdd_wk_0v8"; + regulator-min-microvolt = <800000>; + regulator-max-microvolt = <800000>; + regulator-boot-on; + regulator-always-on; + }; + + ldob2_reg: ldo2 { + regulator-name = "vdd_gpioret_3v3"; + regulator-min-microvolt = <3300000>; + regulator-max-microvolt = <3300000>; + regulator-boot-on; + regulator-always-on; + }; + + ldob3_reg: ldo3 { + regulator-name = "vda_dll_0v8"; + regulator-min-microvolt = <800000>; + regulator-max-microvolt = <800000>; + regulator-boot-on; + regulator-always-on; + }; + + ldob4_reg: ldo4 { + regulator-name = "vda_pll_1v8"; + regulator-min-microvolt = <1800000>; + regulator-max-microvolt = <1800000>; + regulator-boot-on; + regulator-always-on; + }; + }; + }; + + lp876411: lp876411@58 { + compatible = "ti,lp8764"; + reg = <0x58>; + system-power-controller; + interrupt-parent = <&wkup_gpio0>; + interrupts = <39 IRQ_TYPE_EDGE_FALLING>; + + ti,multi-phase-id = <1234>; + + buck1234-supply = <&vsys_3v3>; + + regulators { + buckc1234_reg: buck1234 { + regulator-name = "vdd_core_0v8"; + regulator-min-microvolt = <800000>; + regulator-max-microvolt = <800000>; + regulator-boot-on; + regulator-always-on; + }; + }; + }; +};