From patchwork Wed Mar 29 14:29:47 2023 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Esteban Blanc X-Patchwork-Id: 668359 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org Received: from vger.kernel.org (vger.kernel.org [23.128.96.18]) by smtp.lore.kernel.org (Postfix) with ESMTP id 5D519C6FD18 for ; Wed, 29 Mar 2023 14:35:06 +0000 (UTC) Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S230338AbjC2OfF (ORCPT ); Wed, 29 Mar 2023 10:35:05 -0400 Received: from lindbergh.monkeyblade.net ([23.128.96.19]:57012 "EHLO lindbergh.monkeyblade.net" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S231277AbjC2Oeu (ORCPT ); Wed, 29 Mar 2023 10:34:50 -0400 Received: from mail-wr1-x42a.google.com (mail-wr1-x42a.google.com [IPv6:2a00:1450:4864:20::42a]) by lindbergh.monkeyblade.net (Postfix) with ESMTPS id DBB766A5F for ; Wed, 29 Mar 2023 07:30:50 -0700 (PDT) Received: by mail-wr1-x42a.google.com with SMTP id j24so15990564wrd.0 for ; Wed, 29 Mar 2023 07:30:50 -0700 (PDT) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=baylibre-com.20210112.gappssmtp.com; s=20210112; t=1680100193; h=content-transfer-encoding:mime-version:references:in-reply-to :message-id:date:subject:cc:to:from:from:to:cc:subject:date :message-id:reply-to; bh=o7Irmqu5FyHvI6ZeGAamfBce+DBpyelCHsUucnrnpOE=; b=5cn3dRcptS4ct+0vzsIJ21mh6hnxGjI0CMFZWUFEgWlxYoxcT0KnEt05j5YJnMezgK 9c+FXyMwDEQV7X1+hJXa+IEfLvWUD6rJJBXfjxZFlLIUk32pyKb3g7DqnpPFPsBG0m+i Sa37w5l1MbdZc6gp7FfvGglP8aAtjWPSXwtlpMJ/6XPjtFUeFi4Lgdt0xGHmPAT87oFQ hK2EsBuAYyETljjEQ6zTC+pPwqN0N3Bv6qRVm5W8yFrpJdNy/5PK211siDEEyWRtil5Y NR9pPE0DZs7CnXQlBO2GK2vfI2guahuMFZd4nflT8/p0kwJLhEjGwPpqbw5g+B5x5ps/ JxtQ== X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=1e100.net; s=20210112; t=1680100193; h=content-transfer-encoding:mime-version:references:in-reply-to :message-id:date:subject:cc:to:from:x-gm-message-state:from:to:cc :subject:date:message-id:reply-to; bh=o7Irmqu5FyHvI6ZeGAamfBce+DBpyelCHsUucnrnpOE=; b=0gf2fGbGhbYqCvBxOXJwvqvo4od5FQ8fyf1RJ+JIXzFdoYGrrmbxm1QP0YcOtWXj6c wnV+dtr9pdeLJFKfqgVylokBtV2289DkpCWk8YhFcJje6EOCQXPbYD1xnM+KXurT2EwG YmpyazJ8fcYWNqDJBCjsDxpt6fKSqiXNY7Y8C8W3F8NCyOVsb4FtQmtJd1LTT8l0/1Ep I97ht1eHQ4sOO/o82LOYyHHYjJDZj9RShnY04O02oxylWCx4LqprH0kJI7WvRSqoZSnH 6K22GAfFdzBgiTSooRR4k99SrwdE1tJf6b8ROyb2KUjVi/6hZnp2no2tILCbYYySg0B7 vLDw== X-Gm-Message-State: AAQBX9fRGvt2VnKIemXbuCi7uuMhRDf6tKDH+J8pR58bIKxRpamk+4wO lNCv/3E+D1I+gOtrC4E7+USudQLlO0Vi5g9hRudfzA== X-Google-Smtp-Source: AKy350aRQuFWdT7Qw+6skr24e270Zmd8swCbwm+uKPmAMCABLqRzBygm5WWLep3CTPzQD+lpFiQmUw== X-Received: by 2002:a5d:55c2:0:b0:2d8:7bba:5bb6 with SMTP id i2-20020a5d55c2000000b002d87bba5bb6mr15764204wrw.28.1680100193563; Wed, 29 Mar 2023 07:29:53 -0700 (PDT) Received: from localhost.localdomain ([2a01:e0a:28d:66d0:7049:3791:78c8:6c3]) by smtp.gmail.com with ESMTPSA id b9-20020adfde09000000b002daeb108304sm17270792wrm.33.2023.03.29.07.29.52 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Wed, 29 Mar 2023 07:29:53 -0700 (PDT) From: Esteban Blanc To: nm@ti.com, vigneshr@ti.com, kristo@kernel.org, robh+dt@kernel.org, krzysztof.kozlowski+dt@linaro.org Cc: linux-arm-kernel@lists.infradead.org, devicetree@vger.kernel.org, linux-kernel@vger.kernel.org, sterzik@ti.com, u-kumar1@ti.com, eblanc@baylibre.com, jneanne@baylibre.com, jpanis@baylibre.com Subject: [PATCH v1 3/4] arm64: dts: ti: k3-am62a7-sk: Add support for TPS6593 PMIC Date: Wed, 29 Mar 2023 16:29:47 +0200 Message-Id: <20230329142948.833800-4-eblanc@baylibre.com> X-Mailer: git-send-email 2.39.2 In-Reply-To: <20230329142948.833800-1-eblanc@baylibre.com> References: <20230329142948.833800-1-eblanc@baylibre.com> MIME-Version: 1.0 Precedence: bulk List-ID: X-Mailing-List: devicetree@vger.kernel.org From: Julien Panis This patch adds support for TPS6593 PMIC on main I2C0 bus. This device provides regulators (bucks and LDOs), but also GPIOs, a RTC, a watchdog, an ESM (Error Signal Monitor) which monitors the SoC error output signal, and a PFSM (Pre-configurable Finite State Machine) which manages the operational modes of the PMIC. Signed-off-by: Julien Panis Signed-off-by: Esteban Blanc --- arch/arm64/boot/dts/ti/k3-am62a7-sk.dts | 94 +++++++++++++++++++++++++ 1 file changed, 94 insertions(+) diff --git a/arch/arm64/boot/dts/ti/k3-am62a7-sk.dts b/arch/arm64/boot/dts/ti/k3-am62a7-sk.dts index 5c9012141ee2..c8ed61eb398d 100644 --- a/arch/arm64/boot/dts/ti/k3-am62a7-sk.dts +++ b/arch/arm64/boot/dts/ti/k3-am62a7-sk.dts @@ -191,11 +191,105 @@ AM62AX_IOPAD(0x12c, PIN_INPUT, 0) /* (W16) RGMII1_TX_CTL */ }; }; +&mcu_pmx0 { + status = "okay"; + + pmic_irq_pins_default: pmic-irq-pins-default { + pinctrl-single,pins = < + AM62AX_MCU_IOPAD(0x000, PIN_INPUT, 7) /* (E11) MCU_GPIO0_0 */ + >; + }; +}; + +&mcu_gpio0 { + status = "okay"; +}; + &main_i2c0 { status = "okay"; pinctrl-names = "default"; pinctrl-0 = <&main_i2c0_pins_default>; clock-frequency = <400000>; + + tps659312: tps659312@48 { + compatible = "ti,tps6593"; + reg = <0x48>; + ti,primary-pmic; + system-power-controller; + + pinctrl-names = "default"; + pinctrl-0 = <&pmic_irq_pins_default>; + interrupt-parent = <&mcu_gpio0>; + interrupts = <0 IRQ_TYPE_EDGE_FALLING>; + + ti,multi-phase-id = <123>; + + buck123-supply = <&vcc_3v3_sys>; + buck4-supply = <&vcc_3v3_sys>; + buck5-supply = <&vcc_3v3_sys>; + ldo1-supply = <&vcc_3v3_sys>; + ldo2-supply = <&vcc_3v3_sys>; + ldo3-supply = <&buck5>; + ldo4-supply = <&vcc_3v3_sys>; + + regulators { + buck123: buck123 { + regulator-name = "vcc_core"; + regulator-min-microvolt = <750000>; + regulator-max-microvolt = <850000>; + regulator-boot-on; + regulator-always-on; + }; + + buck4: buck4 { + regulator-name = "vcc_1v1"; + regulator-min-microvolt = <1100000>; + regulator-max-microvolt = <1100000>; + regulator-boot-on; + regulator-always-on; + }; + + buck5: buck5 { + regulator-name = "vcc_1v8_sys"; + regulator-min-microvolt = <1800000>; + regulator-max-microvolt = <1800000>; + regulator-boot-on; + regulator-always-on; + }; + + ldo1: ldo1 { + regulator-name = "vddshv5_sdio"; + regulator-min-microvolt = <3300000>; + regulator-max-microvolt = <3300000>; + regulator-boot-on; + regulator-always-on; + }; + + ldo2: ldo2 { + regulator-name = "vpp_1v8"; + regulator-min-microvolt = <1800000>; + regulator-max-microvolt = <1800000>; + regulator-boot-on; + regulator-always-on; + }; + + ldo3: ldo3 { + regulator-name = "vcc_0v85"; + regulator-min-microvolt = <850000>; + regulator-max-microvolt = <850000>; + regulator-boot-on; + regulator-always-on; + }; + + ldo4: ldo4 { + regulator-name = "vdda_1v8"; + regulator-min-microvolt = <1800000>; + regulator-max-microvolt = <1800000>; + regulator-boot-on; + regulator-always-on; + }; + }; + }; }; &main_i2c1 {