From patchwork Thu Mar 30 05:04:00 2023 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Steffen Trumtrar X-Patchwork-Id: 669268 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org Received: from vger.kernel.org (vger.kernel.org [23.128.96.18]) by smtp.lore.kernel.org (Postfix) with ESMTP id B85E3C761AF for ; Thu, 30 Mar 2023 05:04:28 +0000 (UTC) Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S229519AbjC3FE1 (ORCPT ); Thu, 30 Mar 2023 01:04:27 -0400 Received: from lindbergh.monkeyblade.net ([23.128.96.19]:52304 "EHLO lindbergh.monkeyblade.net" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S229469AbjC3FEZ (ORCPT ); Thu, 30 Mar 2023 01:04:25 -0400 Received: from metis.ext.pengutronix.de (metis.ext.pengutronix.de [IPv6:2001:67c:670:201:290:27ff:fe1d:cc33]) by lindbergh.monkeyblade.net (Postfix) with ESMTPS id D14FD4C21 for ; Wed, 29 Mar 2023 22:04:22 -0700 (PDT) Received: from ptz.office.stw.pengutronix.de ([2a0a:edc0:0:900:1d::77] helo=pengutronix.de) by metis.ext.pengutronix.de with esmtp (Exim 4.92) (envelope-from ) id 1phkSS-0005ZJ-4h; Thu, 30 Mar 2023 07:04:20 +0200 From: Steffen Trumtrar To: linux-stm32@st-md-mailman.stormreply.com Cc: Krzysztof Kozlowski , Maxime Coquelin , Alexandre Torgue , devicetree@vger.kernel.org, linux-arm-kernel@lists.infradead.org, Olivier Moysan Subject: [PATCH v7 02/10] ARM: dts: stm32: Add alternate pinmux for sai2b Date: Thu, 30 Mar 2023 07:04:00 +0200 Message-Id: <20230330050408.3806093-3-s.trumtrar@pengutronix.de> X-Mailer: git-send-email 2.39.1 In-Reply-To: <20230330050408.3806093-1-s.trumtrar@pengutronix.de> References: <20230330050408.3806093-1-s.trumtrar@pengutronix.de> MIME-Version: 1.0 X-SA-Exim-Connect-IP: 2a0a:edc0:0:900:1d::77 X-SA-Exim-Mail-From: s.trumtrar@pengutronix.de X-SA-Exim-Scanned: No (on metis.ext.pengutronix.de); SAEximRunCond expanded to false X-PTX-Original-Recipient: devicetree@vger.kernel.org Precedence: bulk List-ID: X-Mailing-List: devicetree@vger.kernel.org Add another option for the SAI2B pins. This is used on the Phycore STM32MP1. Signed-off-by: Steffen Trumtrar Reviewed-by: Olivier Moysan --- arch/arm/boot/dts/stm32mp15-pinctrl.dtsi | 24 ++++++++++++++++++++++++ 1 file changed, 24 insertions(+) diff --git a/arch/arm/boot/dts/stm32mp15-pinctrl.dtsi b/arch/arm/boot/dts/stm32mp15-pinctrl.dtsi index 1c97db4dbfc6d..0062f8ea17aab 100644 --- a/arch/arm/boot/dts/stm32mp15-pinctrl.dtsi +++ b/arch/arm/boot/dts/stm32mp15-pinctrl.dtsi @@ -1491,6 +1491,30 @@ pins { }; }; + sai2b_pins_d: sai2b-3 { + pins1 { + pinmux = , /* SAI2_SCK_B */ + , /* SAI2_FS_B */ + ; /* SAI2_MCLK_B */ + slew-rate = <0>; + drive-push-pull; + bias-disable; + }; + pins2 { + pinmux = ; /* SAI2_SD_B */ + bias-disable; + }; + }; + + sai2b_sleep_pins_d: sai2b-sleep-3 { + pins1 { + pinmux = , /* SAI2_SCK_B */ + , /* SAI2_FS_B */ + , /* SAI2_MCLK_B */ + ; /* SAI2_SD_B */ + }; + }; + sai4a_pins_a: sai4a-0 { pins { pinmux = ; /* SAI4_SD_A */