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[144.178.202.138]) by smtp.gmail.com with ESMTPSA id sa28-20020a1709076d1c00b00949c04d1c64sm1762378ejc.41.2023.04.07.00.46.12 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Fri, 07 Apr 2023 00:46:12 -0700 (PDT) From: Luca Weiss Date: Fri, 07 Apr 2023 09:45:45 +0200 Subject: [PATCH 2/2] arm64: dts: qcom: pm7250b: make SID configurable MIME-Version: 1.0 Message-Id: <20230407-pm7250b-sid-v1-2-fc648478cc25@fairphone.com> References: <20230407-pm7250b-sid-v1-0-fc648478cc25@fairphone.com> In-Reply-To: <20230407-pm7250b-sid-v1-0-fc648478cc25@fairphone.com> To: Andy Gross , Bjorn Andersson , Konrad Dybcio , Rob Herring , Krzysztof Kozlowski , Konrad Dybcio Cc: ~postmarketos/upstreaming@lists.sr.ht, phone-devel@vger.kernel.org, linux-arm-msm@vger.kernel.org, devicetree@vger.kernel.org, linux-kernel@vger.kernel.org, Luca Weiss X-Mailer: b4 0.12.2 Precedence: bulk List-ID: X-Mailing-List: devicetree@vger.kernel.org Like other Qualcomm PMICs the PM7250B can be used on different addresses on the SPMI bus. Use similar defines like the PMK8350 to make this possible. Signed-off-by: Luca Weiss --- arch/arm64/boot/dts/qcom/pm7250b.dtsi | 23 ++++++++++++++++------- 1 file changed, 16 insertions(+), 7 deletions(-) diff --git a/arch/arm64/boot/dts/qcom/pm7250b.dtsi b/arch/arm64/boot/dts/qcom/pm7250b.dtsi index daa6f1d30efa..eeb476edc79a 100644 --- a/arch/arm64/boot/dts/qcom/pm7250b.dtsi +++ b/arch/arm64/boot/dts/qcom/pm7250b.dtsi @@ -7,6 +7,15 @@ #include #include +/* This PMIC can be configured to be at different SIDs */ +#ifndef PM7250B_SID + #define PM7250B_SID 2 +#endif + +#ifndef PM7250B_SID1 + #define PM7250B_SID1 3 +#endif + / { thermal-zones { pm7250b-thermal { @@ -39,16 +48,16 @@ trip2 { }; &spmi_bus { - pmic@2 { + pmic@PM7250B_SID { compatible = "qcom,pm7250b", "qcom,spmi-pmic"; - reg = <0x2 SPMI_USID>; + reg = ; #address-cells = <1>; #size-cells = <0>; pm7250b_temp: temp-alarm@2400 { compatible = "qcom,spmi-temp-alarm"; reg = <0x2400>; - interrupts = <0x2 0x24 0x0 IRQ_TYPE_EDGE_BOTH>; + interrupts = ; io-channels = <&pm7250b_adc ADC5_DIE_TEMP>; io-channel-names = "thermal"; #thermal-sensor-cells = <0>; @@ -60,7 +69,7 @@ pm7250b_adc: adc@3100 { #address-cells = <1>; #size-cells = <0>; #io-channel-cells = <1>; - interrupts = <0x2 0x31 0x0 IRQ_TYPE_EDGE_RISING>; + interrupts = ; adc-chan@0 { reg = ; @@ -141,7 +150,7 @@ adc-chan@99 { pm7250b_adc_tm: adc-tm@3500 { compatible = "qcom,spmi-adc-tm5"; reg = <0x3500>; - interrupts = <0x2 0x35 0x0 IRQ_TYPE_EDGE_RISING>; + interrupts = ; #thermal-sensor-cells = <1>; #address-cells = <1>; #size-cells = <0>; @@ -149,9 +158,9 @@ pm7250b_adc_tm: adc-tm@3500 { }; }; - pmic@3 { + pmic@PM7250B_SID1 { compatible = "qcom,pm7250b", "qcom,spmi-pmic"; - reg = <0x3 SPMI_USID>; + reg = ; #address-cells = <1>; #size-cells = <0>; };