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[40/40] dt-bindings: pinctrl: qcom,sm8550-tlmm: simplify with unevaluatedProperties

Message ID 20230407184546.161168-40-krzysztof.kozlowski@linaro.org
State Superseded
Headers show
Series [01/40] dt-bindings: pinctrl: qcom,ipq5332-tlmm: simplify with unevaluatedProperties | expand

Commit Message

Krzysztof Kozlowski April 7, 2023, 6:45 p.m. UTC 
All Qualcomm SoC Top Level Mode Multiplexer pin controllers have similar
capabilities regarding pin properties, thus we can just accept entire
set provided by qcom,tlmm-common.yaml schema.

Signed-off-by: Krzysztof Kozlowski <krzysztof.kozlowski@linaro.org>
---
 .../devicetree/bindings/pinctrl/qcom,sm8550-tlmm.yaml | 11 +----------
 1 file changed, 1 insertion(+), 10 deletions(-)
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Patch

diff --git a/Documentation/devicetree/bindings/pinctrl/qcom,sm8550-tlmm.yaml b/Documentation/devicetree/bindings/pinctrl/qcom,sm8550-tlmm.yaml
index a457425ba112..f789c7753a92 100644
--- a/Documentation/devicetree/bindings/pinctrl/qcom,sm8550-tlmm.yaml
+++ b/Documentation/devicetree/bindings/pinctrl/qcom,sm8550-tlmm.yaml
@@ -54,6 +54,7 @@  $defs:
       Pinctrl node's client devices use subnodes for desired pin configuration.
       Client device subnodes use below standard properties.
     $ref: qcom,tlmm-common.yaml#/$defs/qcom-tlmm-state
+    unevaluatedProperties: false
 
     properties:
       pins:
@@ -109,19 +110,9 @@  $defs:
                 uim1_clk, uim1_data, uim1_present, uim1_reset,
                 usb1_hs, usb_phy, vfr_0, vfr_1, vsense_trigger_mirnat ]
 
-      bias-disable: true
-      bias-pull-down: true
-      bias-pull-up: true
-      drive-strength: true
-      input-enable: true
-      output-high: true
-      output-low: true
-
     required:
       - pins
 
-    additionalProperties: false
-
 required:
   - compatible
   - reg