From patchwork Mon Apr 17 09:01:59 2023 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Biju Das X-Patchwork-Id: 674801 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org Received: from vger.kernel.org (vger.kernel.org [23.128.96.18]) by smtp.lore.kernel.org (Postfix) with ESMTP id 38CEBC77B76 for ; Mon, 17 Apr 2023 09:02:31 +0000 (UTC) Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S230427AbjDQJC3 (ORCPT ); Mon, 17 Apr 2023 05:02:29 -0400 Received: from lindbergh.monkeyblade.net ([23.128.96.19]:34298 "EHLO lindbergh.monkeyblade.net" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S230350AbjDQJCQ (ORCPT ); Mon, 17 Apr 2023 05:02:16 -0400 Received: from relmlie6.idc.renesas.com (relmlor2.renesas.com [210.160.252.172]) by lindbergh.monkeyblade.net (Postfix) with ESMTP id C12911FFC; Mon, 17 Apr 2023 02:02:10 -0700 (PDT) X-IronPort-AV: E=Sophos;i="5.99,203,1677510000"; d="scan'208";a="159710161" Received: from unknown (HELO relmlir5.idc.renesas.com) ([10.200.68.151]) by relmlie6.idc.renesas.com with ESMTP; 17 Apr 2023 18:02:10 +0900 Received: from localhost.localdomain (unknown [10.226.92.249]) by relmlir5.idc.renesas.com (Postfix) with ESMTP id EE596400CEF2; Mon, 17 Apr 2023 18:02:07 +0900 (JST) From: Biju Das To: Rob Herring , Krzysztof Kozlowski Cc: Biju Das , Geert Uytterhoeven , Magnus Damm , linux-renesas-soc@vger.kernel.org, devicetree@vger.kernel.org, Prabhakar Mahadev Lad Subject: [PATCH 3/3] arm64: dts: renesas: rzg2l-smarc: Enable MTU3a counter using DT overlay Date: Mon, 17 Apr 2023 10:01:59 +0100 Message-Id: <20230417090159.191346-3-biju.das.jz@bp.renesas.com> X-Mailer: git-send-email 2.25.1 In-Reply-To: <20230417090159.191346-1-biju.das.jz@bp.renesas.com> References: <20230417090159.191346-1-biju.das.jz@bp.renesas.com> MIME-Version: 1.0 Precedence: bulk List-ID: X-Mailing-List: devicetree@vger.kernel.org Enable mtu3 node using dt overlay and disable scif2 node and delete {sd1_mux,sd1_mux_uhs} nodes as the pins are shared with mtu3 external clock input pins and Z phase signal(MTIOC1A). Signed-off-by: Biju Das --- arch/arm64/boot/dts/renesas/Makefile | 2 + .../boot/dts/renesas/rzg2l-smarc-pmod.dtso | 43 +++++++++++++++++++ 2 files changed, 45 insertions(+) create mode 100644 arch/arm64/boot/dts/renesas/rzg2l-smarc-pmod.dtso diff --git a/arch/arm64/boot/dts/renesas/Makefile b/arch/arm64/boot/dts/renesas/Makefile index f130165577a8..57727bcd1334 100644 --- a/arch/arm64/boot/dts/renesas/Makefile +++ b/arch/arm64/boot/dts/renesas/Makefile @@ -81,8 +81,10 @@ dtb-$(CONFIG_ARCH_R9A07G043) += r9a07g043-smarc-pmod.dtbo dtb-$(CONFIG_ARCH_R9A07G044) += r9a07g044c2-smarc.dtb dtb-$(CONFIG_ARCH_R9A07G044) += r9a07g044l2-smarc.dtb dtb-$(CONFIG_ARCH_R9A07G044) += r9a07g044l2-smarc-cru-csi-ov5645.dtbo +dtb-$(CONFIG_ARCH_R9A07G044) += rzg2l-smarc-pmod.dtbo dtb-$(CONFIG_ARCH_R9A07G054) += r9a07g054l2-smarc.dtb +dtb-$(CONFIG_ARCH_R9A07G054) += rzg2l-smarc-pmod.dtbo dtb-$(CONFIG_ARCH_R9A09G011) += r9a09g011-v2mevk2.dtb diff --git a/arch/arm64/boot/dts/renesas/rzg2l-smarc-pmod.dtso b/arch/arm64/boot/dts/renesas/rzg2l-smarc-pmod.dtso new file mode 100644 index 000000000000..a502faf6e1ad --- /dev/null +++ b/arch/arm64/boot/dts/renesas/rzg2l-smarc-pmod.dtso @@ -0,0 +1,43 @@ +// SPDX-License-Identifier: GPL-2.0 +/* + * Device Tree Source for the RZ/{G2L,V2L} SMARC EVK PMOD parts + * + * Copyright (C) 2023 Renesas Electronics Corp. + */ + +/dts-v1/; +/plugin/; + +#include + +&mtu3 { + pinctrl-0 = <&mtu3_pins>; + pinctrl-names = "default"; + + status = "okay"; +}; + +&pinctrl { + mtu3_pins: mtu3 { + mtu3-zphase-clk { + pinmux = ; /* MTIOC1A */ + }; + + mtu3-ext-clk-input-pin { + pinmux = , /* MTCLKA */ + ; /* MTCLKB */ + }; + }; +}; + +&scif2 { + status = "disabled"; +}; + +&sdhi1_pins { + /delete-node/ sd1_mux; +}; + +&sdhi1_pins_uhs { + /delete-node/ sd1_mux_uhs; +};