From patchwork Tue May 16 21:33:05 2023 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Bhupesh Sharma X-Patchwork-Id: 683617 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org Received: from vger.kernel.org (vger.kernel.org [23.128.96.18]) by smtp.lore.kernel.org (Postfix) with ESMTP id F3056C7EE24 for ; Tue, 16 May 2023 21:33:38 +0000 (UTC) Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S229454AbjEPVdi (ORCPT ); Tue, 16 May 2023 17:33:38 -0400 Received: from lindbergh.monkeyblade.net ([23.128.96.19]:49846 "EHLO lindbergh.monkeyblade.net" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S230056AbjEPVdc (ORCPT ); Tue, 16 May 2023 17:33:32 -0400 Received: from mail-pf1-x431.google.com (mail-pf1-x431.google.com [IPv6:2607:f8b0:4864:20::431]) by lindbergh.monkeyblade.net (Postfix) with ESMTPS id F2B1B7687 for ; Tue, 16 May 2023 14:33:26 -0700 (PDT) Received: by mail-pf1-x431.google.com with SMTP id d2e1a72fcca58-64a9335a8e7so8794635b3a.0 for ; Tue, 16 May 2023 14:33:26 -0700 (PDT) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=linaro.org; s=google; t=1684272806; x=1686864806; h=content-transfer-encoding:mime-version:references:in-reply-to :message-id:date:subject:cc:to:from:from:to:cc:subject:date :message-id:reply-to; bh=Q9+WkMxaCFyRvz0ZQf19zyMmoq6vin0MgQ/wuGkS8c8=; b=LsQ50DNSOaG7DgsiPagczsAlTFY68vYJaVEEnINOlsG95bUv+gCD1RMd8/jE6EmAD9 w3v9tgqGAQBj5ALxcvoX0sglgzPNX0b/bJXrOa+5egGrNp5rb0aaZ8qxUcy8PgsEgjL4 GHTL97vDpbli9gcHDPi07OX1uYSaRu6S2qJk3cssHzkbA8UpphKJCIaYmkArarqIWfeF D1EfzIzUkFAbnkfyA1c/zLtBwNxy1oNMXicOXQFpMylXXiZzgGDshgsgC9ICHMnNp7aJ lTtALFx/aJXqvZWwT28zzpBCFyIATV66CVnLWTejQVa0bOMXDaYH97Ucj9XkEBt+DVpq NMAg== X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=1e100.net; s=20221208; t=1684272806; x=1686864806; h=content-transfer-encoding:mime-version:references:in-reply-to :message-id:date:subject:cc:to:from:x-gm-message-state:from:to:cc :subject:date:message-id:reply-to; bh=Q9+WkMxaCFyRvz0ZQf19zyMmoq6vin0MgQ/wuGkS8c8=; b=VWx+FRLQ1MLbHF9WFs4CvpHchrdTlI61YE1rFdf7IOND/DjsZughTDvgF3/VMfo7NY zyv6IjObGvIXLbLU/l0gLb2cByAmJ4ABUfCW4AOv5qqWc/s2mbw6bA0n4tLg8j/oi4pC OudR+7YI6aZ35F4STwdsIejw1OM599DXxZnaNXih9fNZZkxT39pIOvcDGMesZ19WXhy3 yfBDTZat4F2ZKhOIRRi6wnrXexfa03ReKhYVcz/rWx4mmJSiQZxkhNIuQ+LvhgTA1qdY K9oIVWgRxz5Zm4Eh8iiV9O12LEqf5tUkdfo7WiDtUCItpa4CDy3JAvJGapuRRfsd0YFl uJAw== X-Gm-Message-State: AC+VfDw0eboUJn2yxlP6KK7/jlHA5b2md7A2DYa2tPParwH0CqrUWPbn sJlMerfh6HU1spGr/8k6SIz++wKCFnTRdr/XGg4= X-Google-Smtp-Source: ACHHUZ4aHJBM3NOgsQOSNTWh4IKD6mhe6JFnpJnCdbQF2+4RP2d51rkO65t2SLnb11MSEpg7c5HEkw== X-Received: by 2002:a17:902:da87:b0:1ac:7e95:74bf with SMTP id j7-20020a170902da8700b001ac7e9574bfmr200970plx.6.1684272806453; Tue, 16 May 2023 14:33:26 -0700 (PDT) Received: from localhost.localdomain ([2401:4900:1c60:6bed:7a51:340a:a439:1b87]) by smtp.gmail.com with ESMTPSA id jh19-20020a170903329300b001ac7af57fd4sm16027676plb.86.2023.05.16.14.33.22 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Tue, 16 May 2023 14:33:26 -0700 (PDT) From: Bhupesh Sharma To: linux-arm-msm@vger.kernel.org, devicetree@vger.kernel.org, linux-usb@vger.kernel.org Cc: agross@kernel.org, andersson@kernel.org, konrad.dybcio@linaro.org, linux-kernel@vger.kernel.org, bhupesh.linux@gmail.com, bhupesh.sharma@linaro.org, robh+dt@kernel.org, krzysztof.kozlowski+dt@linaro.org, krzysztof.kozlowski@linaro.org Subject: [PATCH v5 2/5] dt-bindings: soc: qcom: eud: Add SM6115 / SM4250 support Date: Wed, 17 May 2023 03:03:05 +0530 Message-Id: <20230516213308.2432018-3-bhupesh.sharma@linaro.org> X-Mailer: git-send-email 2.38.1 In-Reply-To: <20230516213308.2432018-1-bhupesh.sharma@linaro.org> References: <20230516213308.2432018-1-bhupesh.sharma@linaro.org> MIME-Version: 1.0 Precedence: bulk List-ID: X-Mailing-List: devicetree@vger.kernel.org Add dt-bindings for EUD found on Qualcomm SM6115 / SM4250 SoC. On this SoC (and derivatives) the enable bit inside 'tcsr_check_reg' needs to be set first to 'enable' the eud module. So, update the dt-bindings to accommodate the third register property (TCSR Base) required by the driver on these SoCs. Signed-off-by: Bhupesh Sharma --- .../bindings/soc/qcom/qcom,eud.yaml | 42 +++++++++++++++++-- 1 file changed, 39 insertions(+), 3 deletions(-) diff --git a/Documentation/devicetree/bindings/soc/qcom/qcom,eud.yaml b/Documentation/devicetree/bindings/soc/qcom/qcom,eud.yaml index f2c5ec7e6437..9c64b5d9504f 100644 --- a/Documentation/devicetree/bindings/soc/qcom/qcom,eud.yaml +++ b/Documentation/devicetree/bindings/soc/qcom/qcom,eud.yaml @@ -18,12 +18,16 @@ properties: items: - enum: - qcom,sc7280-eud + - qcom,sm6115-eud - const: qcom,eud reg: - items: - - description: EUD Base Register Region - - description: EUD Mode Manager Register + minItems: 2 + maxItems: 3 + + reg-names: + minItems: 2 + maxItems: 3 interrupts: description: EUD interrupt @@ -52,6 +56,38 @@ required: additionalProperties: false +allOf: + - if: + properties: + compatible: + contains: + enum: + - qcom,sc7280-eud + then: + properties: + reg: + maxItems: 2 + reg-names: + items: + - const: eud-base + - const: eud-mode-mgr + + - if: + properties: + compatible: + contains: + enum: + - qcom,sm6115-eud + then: + properties: + reg: + maxItems: 3 + reg-names: + items: + - const: eud-base + - const: eud-mode-mgr + - const: tcsr-base + examples: - | eud@88e0000 {