From patchwork Fri Jun 2 21:49:32 2023 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Nishanth Menon X-Patchwork-Id: 688843 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org Received: from vger.kernel.org (vger.kernel.org [23.128.96.18]) by smtp.lore.kernel.org (Postfix) with ESMTP id 074DBC7EE2F for ; Fri, 2 Jun 2023 21:50:04 +0000 (UTC) Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S235994AbjFBVuC (ORCPT ); Fri, 2 Jun 2023 17:50:02 -0400 Received: from lindbergh.monkeyblade.net ([23.128.96.19]:48042 "EHLO lindbergh.monkeyblade.net" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S236740AbjFBVtz (ORCPT ); Fri, 2 Jun 2023 17:49:55 -0400 Received: from fllv0016.ext.ti.com (fllv0016.ext.ti.com [198.47.19.142]) by lindbergh.monkeyblade.net (Postfix) with ESMTPS id 108841BC; Fri, 2 Jun 2023 14:49:53 -0700 (PDT) Received: from lelv0266.itg.ti.com ([10.180.67.225]) by fllv0016.ext.ti.com (8.15.2/8.15.2) with ESMTP id 352LndK5051733; Fri, 2 Jun 2023 16:49:39 -0500 DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=ti.com; s=ti-com-17Q1; t=1685742579; bh=yv1bvYFFWQAlJswVkyJ3gz/gfRGJgtR1MMsz6/3tEJU=; h=From:To:CC:Subject:Date:In-Reply-To:References; b=qmonMghL+MfZ/BWFzJH3kQmO3fybPAbyWEb1pTRMNSDdoO62q2rn+SucGzBnzdxgN 3lUOwgXgqzL6mb+BHDMF07olVNKX1dxvX7iOI6bsU8GDY2W16ab9BLx9H4znUh0BAJ voFjuQlD71Kr2DgpbH1twUMQkQPWQFTjcJBGXlZE= Received: from DFLE111.ent.ti.com (dfle111.ent.ti.com [10.64.6.32]) by lelv0266.itg.ti.com (8.15.2/8.15.2) with ESMTPS id 352LndfA017962 (version=TLSv1.2 cipher=AES256-GCM-SHA384 bits=256 verify=FAIL); Fri, 2 Jun 2023 16:49:39 -0500 Received: from DFLE106.ent.ti.com (10.64.6.27) by DFLE111.ent.ti.com (10.64.6.32) with Microsoft SMTP Server (version=TLS1_2, cipher=TLS_ECDHE_RSA_WITH_AES_128_CBC_SHA256_P256) id 15.1.2507.23; Fri, 2 Jun 2023 16:49:38 -0500 Received: from lelv0327.itg.ti.com (10.180.67.183) by DFLE106.ent.ti.com (10.64.6.27) with Microsoft SMTP Server (version=TLS1_2, cipher=TLS_ECDHE_RSA_WITH_AES_128_CBC_SHA256_P256) id 15.1.2507.23 via Frontend Transport; Fri, 2 Jun 2023 16:49:38 -0500 Received: from localhost (ileaxei01-snat.itg.ti.com [10.180.69.5]) by lelv0327.itg.ti.com (8.15.2/8.15.2) with ESMTP id 352LncaR119892; Fri, 2 Jun 2023 16:49:38 -0500 From: Nishanth Menon To: Conor Dooley , Krzysztof Kozlowski , Rob Herring , Tero Kristo , Vignesh Raghavendra CC: , , , Nishanth Menon , Udit Kumar , Nitin Yadav , Neha Malcom Francis , Sinthu Raja , Thejasvi Konduru , Dasnavis Sabiya Subject: [PATCH 3/8] arm64: dts: ti: k3-j784s4-evm: Enable wakeup_i2c0 and eeprom Date: Fri, 2 Jun 2023 16:49:32 -0500 Message-ID: <20230602214937.2349545-4-nm@ti.com> X-Mailer: git-send-email 2.40.0 In-Reply-To: <20230602214937.2349545-1-nm@ti.com> References: <20230602214937.2349545-1-nm@ti.com> MIME-Version: 1.0 X-EXCLAIMER-MD-CONFIG: e1e8a2fd-e40a-4ac6-ac9b-f7e9cc9ee180 Precedence: bulk List-ID: X-Mailing-List: devicetree@vger.kernel.org Enable wakeup_i2c and use un-used pinmux. While at it, describe the board detection eeprom present on the board. Signed-off-by: Nishanth Menon --- Depends on https://lore.kernel.org/linux-arm-kernel/20230503083143.32369-1-t-konduru@ti.com/ arch/arm64/boot/dts/ti/k3-j784s4-evm.dts | 21 +++++++++++++++++++++ 1 file changed, 21 insertions(+) diff --git a/arch/arm64/boot/dts/ti/k3-j784s4-evm.dts b/arch/arm64/boot/dts/ti/k3-j784s4-evm.dts index 3f499e527523..f394ab409934 100644 --- a/arch/arm64/boot/dts/ti/k3-j784s4-evm.dts +++ b/arch/arm64/boot/dts/ti/k3-j784s4-evm.dts @@ -25,6 +25,7 @@ aliases { serial2 = &main_uart8; mmc0 = &main_sdhci0; mmc1 = &main_sdhci1; + i2c0 = &wkup_i2c0; i2c3 = &main_i2c0; }; @@ -153,6 +154,13 @@ J721S2_WKUP_IOPAD(0x04c, PIN_INPUT, 0) /* (K34) WKUP_UART0_TXD */ >; }; + wkup_i2c0_pins_default: wkup-i2c0-pins-default { + pinctrl-single,pins = < + J721S2_WKUP_IOPAD(0x98, PIN_INPUT, 0) /* (N33) WKUP_I2C0_SCL */ + J721S2_WKUP_IOPAD(0x9c, PIN_INPUT, 0) /* (N35) WKUP_I2C0_SDA */ + >; + }; + mcu_uart0_pins_default: mcu-uart0-pins-default { pinctrl-single,pins = < J784S4_WKUP_IOPAD(0x090, PIN_INPUT, 0) /* (H37) WKUP_GPIO0_14.MCU_UART0_CTSn */ @@ -194,6 +202,19 @@ &wkup_uart0 { pinctrl-0 = <&wkup_uart0_pins_default>; }; +&wkup_i2c0 { + status = "okay"; + pinctrl-names = "default"; + pinctrl-0 = <&wkup_i2c0_pins_default>; + clock-frequency = <400000>; + + eeprom@50 { + /* CAV24C256WE-GT3 */ + compatible = "atmel,24c256"; + reg = <0x50>; + }; +}; + &mcu_uart0 { status = "okay"; pinctrl-names = "default";