From patchwork Sun Jun 4 14:56:39 2023 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Paul Cercueil X-Patchwork-Id: 689088 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org Received: from vger.kernel.org (vger.kernel.org [23.128.96.18]) by smtp.lore.kernel.org (Postfix) with ESMTP id 785A6C7EE29 for ; Sun, 4 Jun 2023 14:58:22 +0000 (UTC) Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S232390AbjFDO6V (ORCPT ); Sun, 4 Jun 2023 10:58:21 -0400 Received: from lindbergh.monkeyblade.net ([23.128.96.19]:34610 "EHLO lindbergh.monkeyblade.net" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S229806AbjFDO6R (ORCPT ); Sun, 4 Jun 2023 10:58:17 -0400 Received: from aposti.net (aposti.net [89.234.176.197]) by lindbergh.monkeyblade.net (Postfix) with ESMTPS id D2A0E1B1; Sun, 4 Jun 2023 07:58:09 -0700 (PDT) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=crapouillou.net; s=mail; t=1685890617; h=from:from:reply-to:subject:subject:date:date:message-id:message-id: to:to:cc:cc:mime-version:mime-version: content-transfer-encoding:content-transfer-encoding: in-reply-to:in-reply-to:references:references; bh=dxdaZYpsh0LWTwoNnhJ3KSRH4Xn+PKI7zDErKH1NAn4=; b=KJwxIzN+abhzTB0FcY+2sgcOJlie3P3sZhcpZ+osNAXkIhLe4iFSQcJF3I33Tfz1pVTS4X V94SLH0XNQTnNpERzkPXha+nEBvGiYFmXHELAlpRyL6fDZ0E5a6pJzuFUA24LotyNVZqM0 VEPsB2xwAMQ0UbwCHEv83N4eoXqX/hI= From: Paul Cercueil To: Thomas Bogendoerfer , Rob Herring , Krzysztof Kozlowski , Conor Dooley Cc: "H . Nikolaus Schaller" , linux-mips@vger.kernel.org, devicetree@vger.kernel.org, linux-kernel@vger.kernel.org, list@opendingux.net, Paul Cercueil Subject: [PATCH 6/9] MIPS: DTS: CI20: Parent MSCMUX clock to MPLL Date: Sun, 4 Jun 2023 16:56:39 +0200 Message-Id: <20230604145642.200577-7-paul@crapouillou.net> In-Reply-To: <20230604145642.200577-1-paul@crapouillou.net> References: <20230604145642.200577-1-paul@crapouillou.net> MIME-Version: 1.0 X-Spam: Yes Precedence: bulk List-ID: X-Mailing-List: devicetree@vger.kernel.org This makes it possible to clock the SD cards much higher, as the MPLL is running at 1.2 GHz by default. The previous parent was the EXT clock, which caused the SD cards to be clocked at 24 MHz maximum. Signed-off-by: Paul Cercueil --- arch/mips/boot/dts/ingenic/ci20.dts | 5 +++-- 1 file changed, 3 insertions(+), 2 deletions(-) diff --git a/arch/mips/boot/dts/ingenic/ci20.dts b/arch/mips/boot/dts/ingenic/ci20.dts index b7dbafa1f85d..bdbd064c90e1 100644 --- a/arch/mips/boot/dts/ingenic/ci20.dts +++ b/arch/mips/boot/dts/ingenic/ci20.dts @@ -129,10 +129,11 @@ &cgu { */ assigned-clocks = <&cgu JZ4780_CLK_OTGPHY>, <&cgu JZ4780_CLK_RTC>, <&cgu JZ4780_CLK_SSIPLL>, <&cgu JZ4780_CLK_SSI>, - <&cgu JZ4780_CLK_HDMI>; + <&cgu JZ4780_CLK_HDMI>, <&cgu JZ4780_CLK_MSCMUX>; assigned-clock-parents = <0>, <&cgu JZ4780_CLK_RTCLK>, <&cgu JZ4780_CLK_MPLL>, - <&cgu JZ4780_CLK_SSIPLL>; + <&cgu JZ4780_CLK_SSIPLL>, + <0>, <&cgu JZ4780_CLK_MPLL>; assigned-clock-rates = <48000000>, <0>, <54000000>, <0>, <27000000>; };