From patchwork Fri Jul 28 10:26:36 2023 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Varshini Rajendran X-Patchwork-Id: 707674 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org Received: from vger.kernel.org (vger.kernel.org [23.128.96.18]) by smtp.lore.kernel.org (Postfix) with ESMTP id 20B03C0015E for ; Fri, 28 Jul 2023 10:28:41 +0000 (UTC) Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S234227AbjG1K2k (ORCPT ); Fri, 28 Jul 2023 06:28:40 -0400 Received: from lindbergh.monkeyblade.net ([23.128.96.19]:52518 "EHLO lindbergh.monkeyblade.net" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S236079AbjG1K2X (ORCPT ); Fri, 28 Jul 2023 06:28:23 -0400 Received: from esa.microchip.iphmx.com (esa.microchip.iphmx.com [68.232.153.233]) by lindbergh.monkeyblade.net (Postfix) with ESMTPS id A5C5C46B4; Fri, 28 Jul 2023 03:27:30 -0700 (PDT) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/simple; d=microchip.com; i=@microchip.com; q=dns/txt; s=mchp; t=1690540051; x=1722076051; h=from:to:cc:subject:date:message-id:mime-version: content-transfer-encoding; bh=igHDeF92LiyJV6CYdDteCC2bRTjg8rQRg4+bhnAd1mA=; b=GnelcdFdc5T07GjNr8NyiWx73LQld8w1hnu8JnmttAffVGbCP7a1kQGF Y9CwV3h3swFZBgviZ72twhGZuG9DapIWVDFrNycBgebnQNpo3Y2mavS+O UhpXHpC0VImANihPVZyxhKb/Tu9y1Kd1BwGMpG3z2+ybW1au8kaQbzoP5 MrhZ/6TiG1Z03qsTqXr7eoRIR+pohwyvPnT81zX8lwuhl+ZuzTGFoXb7n x6ZX55iW0NGr8OCzOUTBByPFXzpaqrduwYgdvlWn7Oiv3FeXDgSI0xODF uvgXXK/jF1ukxWTFwFYsPdmFCq1Muq4Z7STPQtS2yvTZOW28lOl/cN7ee w==; X-IronPort-AV: E=Sophos;i="6.01,237,1684825200"; d="scan'208";a="226623140" X-Amp-Result: SKIPPED(no attachment in message) Received: from unknown (HELO email.microchip.com) ([170.129.1.10]) by esa5.microchip.iphmx.com with ESMTP/TLS/AES256-SHA256; 28 Jul 2023 03:26:50 -0700 Received: from chn-vm-ex03.mchp-main.com (10.10.85.151) by chn-vm-ex04.mchp-main.com (10.10.85.152) with Microsoft SMTP Server (version=TLS1_2, cipher=TLS_ECDHE_RSA_WITH_AES_128_GCM_SHA256) id 15.1.2507.21; Fri, 28 Jul 2023 03:26:45 -0700 Received: from che-lt-i67070.amer.actel.com (10.10.115.15) by chn-vm-ex03.mchp-main.com (10.10.85.151) with Microsoft SMTP Server id 15.1.2507.21 via Frontend Transport; Fri, 28 Jul 2023 03:26:39 -0700 From: Varshini Rajendran To: , , , , , , , , , , , , , CC: Subject: [PATCH v3 20/50] dt-bindings: atmel-nand: add microchip,sam9x7-pmecc Date: Fri, 28 Jul 2023 15:56:36 +0530 Message-ID: <20230728102636.266309-1-varshini.rajendran@microchip.com> X-Mailer: git-send-email 2.25.1 MIME-Version: 1.0 Precedence: bulk List-ID: X-Mailing-List: devicetree@vger.kernel.org Add microchip,sam9x7-pmecc to DT bindings documentation. Signed-off-by: Varshini Rajendran --- Documentation/devicetree/bindings/mtd/atmel-nand.txt | 1 + 1 file changed, 1 insertion(+) diff --git a/Documentation/devicetree/bindings/mtd/atmel-nand.txt b/Documentation/devicetree/bindings/mtd/atmel-nand.txt index 50645828ac20..4598930851d9 100644 --- a/Documentation/devicetree/bindings/mtd/atmel-nand.txt +++ b/Documentation/devicetree/bindings/mtd/atmel-nand.txt @@ -56,6 +56,7 @@ Required properties: "atmel,sama5d4-pmecc" "atmel,sama5d2-pmecc" "microchip,sam9x60-pmecc" + "microchip,sam9x7-pmecc", "atmel,at91sam9g45-pmecc" - reg: should contain 2 register ranges. The first one is pointing to the PMECC block, and the second one to the PMECC_ERRLOC block.