| Message ID | 20230728102943.267342-1-varshini.rajendran@microchip.com |
|---|---|
| State | Accepted |
| Commit | 3dc73106ffc47640e692b9b32ebfd59d776c07fd |
| Headers | show
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From: Varshini Rajendran <varshini.rajendran@microchip.com>
To: <mturquette@baylibre.com>, <sboyd@kernel.org>,
<robh+dt@kernel.org>, <krzysztof.kozlowski+dt@linaro.org>,
<conor+dt@kernel.org>, <nicolas.ferre@microchip.com>,
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CC: <varshini.rajendran@microchip.com>
Subject: [PATCH v3 40/50] clk: at91: sam9x7: Allow PLLs to be exported and
referenced in DT
Date: Fri, 28 Jul 2023 15:59:43 +0530
Message-ID: <20230728102943.267342-1-varshini.rajendran@microchip.com>
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| Series |
[v3,01/50] dt-bindings: microchip: atmel,at91rm9200-tcb: add sam9x60, sam9x7 compatible
|
expand
|
diff --git a/include/dt-bindings/clock/at91.h b/include/dt-bindings/clock/at91.h index 3e3972a814c1..6ede88c3992d 100644 --- a/include/dt-bindings/clock/at91.h +++ b/include/dt-bindings/clock/at91.h @@ -38,6 +38,10 @@ #define PMC_CPU (PMC_MAIN + 9) #define PMC_MCK1 (PMC_MAIN + 10) +/* SAM9X7 */ +#define PMC_PLLADIV2 (PMC_MAIN + 11) +#define PMC_LVDSPLL (PMC_MAIN + 12) + #ifndef AT91_PMC_MOSCS #define AT91_PMC_MOSCS 0 /* MOSCS Flag */ #define AT91_PMC_LOCKA 1 /* PLLA Lock */
Allow PLLADIV2 and LVDSPLL to be referenced as a PMC_TYPE_CORE clock from phandle in DT. Signed-off-by: Varshini Rajendran <varshini.rajendran@microchip.com> --- include/dt-bindings/clock/at91.h | 4 ++++ 1 file changed, 4 insertions(+)