From patchwork Wed Aug 2 20:52:59 2023 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Andrew Davis X-Patchwork-Id: 709348 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org Received: from vger.kernel.org (vger.kernel.org [23.128.96.18]) by smtp.lore.kernel.org (Postfix) with ESMTP id C6E75C001E0 for ; Wed, 2 Aug 2023 20:53:26 +0000 (UTC) Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S232601AbjHBUxZ (ORCPT ); Wed, 2 Aug 2023 16:53:25 -0400 Received: from lindbergh.monkeyblade.net ([23.128.96.19]:44606 "EHLO lindbergh.monkeyblade.net" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S232422AbjHBUxW (ORCPT ); Wed, 2 Aug 2023 16:53:22 -0400 Received: from lelv0143.ext.ti.com (lelv0143.ext.ti.com [198.47.23.248]) by lindbergh.monkeyblade.net (Postfix) with ESMTPS id 4984326B2; Wed, 2 Aug 2023 13:53:21 -0700 (PDT) Received: from lelv0266.itg.ti.com ([10.180.67.225]) by lelv0143.ext.ti.com (8.15.2/8.15.2) with ESMTP id 372KrDFL045366; Wed, 2 Aug 2023 15:53:13 -0500 DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=ti.com; s=ti-com-17Q1; t=1691009593; bh=fWSyFj3uZd4vOshVZF6VQQ8ba4qh5QIH6FgUNDtjwug=; h=From:To:CC:Subject:Date:In-Reply-To:References; b=tawHfSXvY4trqc512CDqTf1SLM1EMYjuIT9ICGoVdoRNQT60FHyl+T+82Z9S+6RfM dp6u+/dJAVrSX/TkpxuVMHfWkRyTfzmHc60HoLv3bwdJNvVlwjI+2oUcrpoHNqNlNq iuRZNSWoqvPRrdJuox/rcKDgzAp35TRi4bGNvXfg= Received: from DLEE106.ent.ti.com (dlee106.ent.ti.com [157.170.170.36]) by lelv0266.itg.ti.com (8.15.2/8.15.2) with ESMTPS id 372KrDNu086539 (version=TLSv1.2 cipher=AES256-GCM-SHA384 bits=256 verify=FAIL); Wed, 2 Aug 2023 15:53:13 -0500 Received: from DLEE102.ent.ti.com (157.170.170.32) by DLEE106.ent.ti.com (157.170.170.36) with Microsoft SMTP Server (version=TLS1_2, cipher=TLS_ECDHE_RSA_WITH_AES_128_CBC_SHA256_P256) id 15.1.2507.23; Wed, 2 Aug 2023 15:53:13 -0500 Received: from fllv0040.itg.ti.com (10.64.41.20) by DLEE102.ent.ti.com (157.170.170.32) with Microsoft SMTP Server (version=TLS1_2, cipher=TLS_ECDHE_RSA_WITH_AES_128_CBC_SHA256_P256) id 15.1.2507.23 via Frontend Transport; Wed, 2 Aug 2023 15:53:13 -0500 Received: from lelv0326.itg.ti.com (ileaxei01-snat.itg.ti.com [10.180.69.5]) by fllv0040.itg.ti.com (8.15.2/8.15.2) with ESMTP id 372KrASA090834; Wed, 2 Aug 2023 15:53:12 -0500 From: Andrew Davis To: Nishanth Menon , Vignesh Raghavendra , Tero Kristo , Rob Herring , Krzysztof Kozlowski , Conor Dooley , CC: , , Andrew Davis Subject: [PATCH 03/13] arm64: dts: ti: k3-j721s2: Enable SDHCI nodes at the board level Date: Wed, 2 Aug 2023 15:52:59 -0500 Message-ID: <20230802205309.257392-4-afd@ti.com> X-Mailer: git-send-email 2.39.2 In-Reply-To: <20230802205309.257392-1-afd@ti.com> References: <20230802205309.257392-1-afd@ti.com> MIME-Version: 1.0 X-EXCLAIMER-MD-CONFIG: e1e8a2fd-e40a-4ac6-ac9b-f7e9cc9ee180 Precedence: bulk List-ID: X-Mailing-List: devicetree@vger.kernel.org SDHCI nodes defined in the top-level J721s2 SoC dtsi files are incomplete and will not be functional unless they are extended. As the attached SD/eMMC is only known about at the board integration level, these nodes should only be enabled when provided with this information. Disable the SDHCI nodes in the dtsi files and only enable the ones that are actually pinned out on a given board. Signed-off-by: Andrew Davis --- arch/arm64/boot/dts/ti/k3-am68-sk-base-board.dts | 6 +----- arch/arm64/boot/dts/ti/k3-j721s2-common-proc-board.dts | 2 ++ arch/arm64/boot/dts/ti/k3-j721s2-main.dtsi | 2 ++ 3 files changed, 5 insertions(+), 5 deletions(-) diff --git a/arch/arm64/boot/dts/ti/k3-am68-sk-base-board.dts b/arch/arm64/boot/dts/ti/k3-am68-sk-base-board.dts index 21ad49cfa7eed..ffca12df0a6da 100644 --- a/arch/arm64/boot/dts/ti/k3-am68-sk-base-board.dts +++ b/arch/arm64/boot/dts/ti/k3-am68-sk-base-board.dts @@ -373,13 +373,9 @@ &mcu_i2c0 { clock-frequency = <400000>; }; -&main_sdhci0 { - /* Unused */ - status = "disabled"; -}; - &main_sdhci1 { /* SD card */ + status = "okay"; pinctrl-0 = <&main_mmc1_pins_default>; pinctrl-names = "default"; disable-wp; diff --git a/arch/arm64/boot/dts/ti/k3-j721s2-common-proc-board.dts b/arch/arm64/boot/dts/ti/k3-j721s2-common-proc-board.dts index 02b7a559bdf21..3a8e6eb402448 100644 --- a/arch/arm64/boot/dts/ti/k3-j721s2-common-proc-board.dts +++ b/arch/arm64/boot/dts/ti/k3-j721s2-common-proc-board.dts @@ -333,6 +333,7 @@ exp2: gpio@22 { &main_sdhci0 { /* eMMC */ + status = "okay"; non-removable; ti,driver-strength-ohm = <50>; disable-wp; @@ -340,6 +341,7 @@ &main_sdhci0 { &main_sdhci1 { /* SD card */ + status = "okay"; pinctrl-0 = <&main_mmc1_pins_default>; pinctrl-names = "default"; disable-wp; diff --git a/arch/arm64/boot/dts/ti/k3-j721s2-main.dtsi b/arch/arm64/boot/dts/ti/k3-j721s2-main.dtsi index ed79ab3a32718..c46079fe4ed6e 100644 --- a/arch/arm64/boot/dts/ti/k3-j721s2-main.dtsi +++ b/arch/arm64/boot/dts/ti/k3-j721s2-main.dtsi @@ -665,6 +665,7 @@ main_sdhci0: mmc@4f80000 { mmc-hs200-1_8v; mmc-hs400-1_8v; dma-coherent; + status = "disabled"; }; main_sdhci1: mmc@4fb0000 { @@ -694,6 +695,7 @@ main_sdhci1: mmc@4fb0000 { dma-coherent; /* Masking support for SDR104 capability */ sdhci-caps-mask = <0x00000003 0x00000000>; + status = "disabled"; }; main_navss: bus@30000000 {