From patchwork Fri Sep 22 06:53:27 2023 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Yoshihiro Shimoda X-Patchwork-Id: 725411 Received: from lindbergh.monkeyblade.net (lindbergh.monkeyblade.net [23.128.96.19]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by smtp.subspace.kernel.org (Postfix) with ESMTPS id 8C16D1798D for ; Fri, 22 Sep 2023 06:53:45 +0000 (UTC) Received: from relmlie5.idc.renesas.com (relmlor1.renesas.com [210.160.252.171]) by lindbergh.monkeyblade.net (Postfix) with ESMTP id BABC31A1; Thu, 21 Sep 2023 23:53:42 -0700 (PDT) X-IronPort-AV: E=Sophos;i="6.03,167,1694703600"; d="scan'208";a="176885449" Received: from unknown (HELO relmlir5.idc.renesas.com) ([10.200.68.151]) by relmlie5.idc.renesas.com with ESMTP; 22 Sep 2023 15:53:40 +0900 Received: from localhost.localdomain (unknown [10.166.15.32]) by relmlir5.idc.renesas.com (Postfix) with ESMTP id 0ADC0400F799; Fri, 22 Sep 2023 15:53:40 +0900 (JST) From: Yoshihiro Shimoda To: lpieralisi@kernel.org, kw@linux.com, robh@kernel.org, bhelgaas@google.com, krzysztof.kozlowski+dt@linaro.org, conor+dt@kernel.org, jingoohan1@gmail.com, gustavo.pimentel@synopsys.com, mani@kernel.org Cc: marek.vasut+renesas@gmail.com, linux-pci@vger.kernel.org, devicetree@vger.kernel.org, linux-renesas-soc@vger.kernel.org, Yoshihiro Shimoda Subject: [PATCH v21 12/16] PCI: add T_PVPERL macro Date: Fri, 22 Sep 2023 15:53:27 +0900 Message-Id: <20230922065331.3806925-13-yoshihiro.shimoda.uh@renesas.com> X-Mailer: git-send-email 2.25.1 In-Reply-To: <20230922065331.3806925-1-yoshihiro.shimoda.uh@renesas.com> References: <20230922065331.3806925-1-yoshihiro.shimoda.uh@renesas.com> Precedence: bulk X-Mailing-List: devicetree@vger.kernel.org List-Id: List-Subscribe: List-Unsubscribe: MIME-Version: 1.0 X-Spam-Status: No, score=-1.9 required=5.0 tests=BAYES_00,SPF_HELO_NONE, SPF_PASS autolearn=ham autolearn_force=no version=3.4.6 X-Spam-Checker-Version: SpamAssassin 3.4.6 (2021-04-09) on lindbergh.monkeyblade.net According to the PCI Express Card Electromechanical Specification, Power stable to PERST# inactive interval is 100 ms as minimum. So, add the macro to use PCIe controller drivers. Signed-off-by: Yoshihiro Shimoda Reviewed-by: Manivannan Sadhasivam --- drivers/pci/pci.h | 3 +++ 1 file changed, 3 insertions(+) diff --git a/drivers/pci/pci.h b/drivers/pci/pci.h index 39a8932dc340..5ecbcf041179 100644 --- a/drivers/pci/pci.h +++ b/drivers/pci/pci.h @@ -13,6 +13,9 @@ #define PCIE_LINK_RETRAIN_TIMEOUT_MS 1000 +/* Power stable to PERST# inactive from PCIe card Electromechanical Spec */ +#define PCIE_T_PVPERL_MS 100 + /* * PCIe r6.0, sec 5.3.3.2.1 * Recommends 1ms to 10ms timeout to check L2 ready.