| Message ID | 20231030132523.86123-2-angelogioacchino.delregno@collabora.com |
|---|---|
| State | New |
| Headers | show |
| Series | MT8195 Cherry: Assign MFG vregs for power saving | expand |
diff --git a/arch/arm64/boot/dts/mediatek/mt8195-cherry.dtsi b/arch/arm64/boot/dts/mediatek/mt8195-cherry.dtsi index 2c2f079600ba..26213100419a 100644 --- a/arch/arm64/boot/dts/mediatek/mt8195-cherry.dtsi +++ b/arch/arm64/boot/dts/mediatek/mt8195-cherry.dtsi @@ -478,6 +478,10 @@ pmic@34 { }; }; +&mfg0 { + domain-supply = <&mt6315_7_vbuck1>; +}; + &mmc0 { status = "okay"; @@ -1231,7 +1235,6 @@ mt6315_7_vbuck1: vbuck1 { regulator-enable-ramp-delay = <256>; regulator-ramp-delay = <6250>; regulator-allowed-modes = <0 1 2>; - regulator-always-on; }; }; };
MFG0 is the main power domain for the GPU and its surrounding glue logic, and has a specific power rail. Add its power supply on Cherry platforms and remove the now useless (and wrong) regulator-always-on property from the vbuck1 regulator. Signed-off-by: AngeloGioacchino Del Regno <angelogioacchino.delregno@collabora.com> --- arch/arm64/boot/dts/mediatek/mt8195-cherry.dtsi | 5 ++++- 1 file changed, 4 insertions(+), 1 deletion(-)