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b=QMrzt4x3BgoUBl4i0VMOjBqUwBGgU81rLBah87rn/YoJbcg3Cg0z1GxNCcBO7xG6xDhAspGY0r6prerOfQLNCIKKw90l+c0QWMpqaPjMEuwsZWHW4anDV55aK/w6HwnvA/vesybs5Cz0fM9RPU1mM48OxdjV+B94cK2+C/AXirs= Authentication-Results: dkim=none (message not signed) header.d=none;dmarc=none action=none header.from=nxp.com; Received: from AM6PR04MB4838.eurprd04.prod.outlook.com (2603:10a6:20b:4::16) by AM9PR04MB8113.eurprd04.prod.outlook.com (2603:10a6:20b:3b5::7) with Microsoft SMTP Server (version=TLS1_2, cipher=TLS_ECDHE_RSA_WITH_AES_256_GCM_SHA384) id 15.20.7002.17; Tue, 14 Nov 2023 15:48:59 +0000 Received: from AM6PR04MB4838.eurprd04.prod.outlook.com ([fe80::bc7:1dcd:684d:4494]) by AM6PR04MB4838.eurprd04.prod.outlook.com ([fe80::bc7:1dcd:684d:4494%4]) with mapi id 15.20.7002.015; Tue, 14 Nov 2023 15:48:59 +0000 From: Frank Li To: krzysztof.kozlowski@linaro.org, shawnguo@kernel.org, festevam@denx.de Cc: Frank.li@nxp.com, devicetree@vger.kernel.org, dmaengine@vger.kernel.org, imx@lists.linux.dev, joy.zou@nxp.com, krzysztof.kozlowski+dt@linaro.org, linux-kernel@vger.kernel.org, peng.fan@nxp.com, robh+dt@kernel.org, shenwei.wang@nxp.com, vkoul@kernel.org Subject: [PATCH 4/4] arm64: dts: imx93: Fix EDMA transfer failure Date: Tue, 14 Nov 2023 10:48:24 -0500 Message-Id: <20231114154824.3617255-5-Frank.Li@nxp.com> X-Mailer: git-send-email 2.34.1 In-Reply-To: <20231114154824.3617255-1-Frank.Li@nxp.com> References: <20231114154824.3617255-1-Frank.Li@nxp.com> X-ClientProxiedBy: BY5PR13CA0010.namprd13.prod.outlook.com (2603:10b6:a03:180::23) To AM6PR04MB4838.eurprd04.prod.outlook.com (2603:10a6:20b:4::16) Precedence: bulk X-Mailing-List: devicetree@vger.kernel.org List-Id: List-Subscribe: List-Unsubscribe: MIME-Version: 1.0 X-MS-PublicTrafficType: Email X-MS-TrafficTypeDiagnostic: AM6PR04MB4838:EE_|AM9PR04MB8113:EE_ X-MS-Office365-Filtering-Correlation-Id: f261359b-e079-4001-9f4e-08dbe5293755 X-MS-Exchange-SenderADCheck: 1 X-MS-Exchange-AntiSpam-Relay: 0 X-Microsoft-Antispam: BCL:0; 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The previous eDMA driver did not account for these restrictions, and it worked due to the order in dts matching the requirements. The commit below reverts the rx/tx channel, triggering this issue. Adds channel requirements to the dts to instruct the driver to allocate odd or even channels, ensuring it is not dependent on the order of rx/tx in dts. Fixes: a725990557e7 ("arm64: dts: imx93: Fix the dmas entries order") Signed-off-by: Frank Li --- arch/arm64/boot/dts/freescale/imx93.dtsi | 13 +++++++++---- 1 file changed, 9 insertions(+), 4 deletions(-) diff --git a/arch/arm64/boot/dts/freescale/imx93.dtsi b/arch/arm64/boot/dts/freescale/imx93.dtsi index ceccf47664407..6f06ebdcb2513 100644 --- a/arch/arm64/boot/dts/freescale/imx93.dtsi +++ b/arch/arm64/boot/dts/freescale/imx93.dtsi @@ -4,6 +4,7 @@ */ #include +#include #include #include #include @@ -670,7 +671,8 @@ lpuart3: serial@42570000 { interrupts = ; clocks = <&clk IMX93_CLK_LPUART3_GATE>; clock-names = "ipg"; - dmas = <&edma2 18 0 1>, <&edma2 17 0 0>; + dmas = <&edma2 18 0 (FSL_EDMA_RX | FSL_EDMA_ODD_CH)>, + <&edma2 17 0 FSL_EDMA_EVEN_CH>; dma-names = "rx", "tx"; status = "disabled"; }; @@ -681,7 +683,8 @@ lpuart4: serial@42580000 { interrupts = ; clocks = <&clk IMX93_CLK_LPUART4_GATE>; clock-names = "ipg"; - dmas = <&edma2 20 0 1>, <&edma2 19 0 0>; + dmas = <&edma2 20 0 (FSL_EDMA_RX | FSL_EDMA_ODD_CH)>, + <&edma2 19 0 FSL_EDMA_EVEN_CH>; dma-names = "rx", "tx"; status = "disabled"; }; @@ -692,7 +695,8 @@ lpuart5: serial@42590000 { interrupts = ; clocks = <&clk IMX93_CLK_LPUART5_GATE>; clock-names = "ipg"; - dmas = <&edma2 22 0 1>, <&edma2 21 0 0>; + dmas = <&edma2 22 0 (FSL_EDMA_RX | FSL_EDMA_ODD_CH)>, + <&edma2 21 0 FSL_EDMA_EVEN_CH>; dma-names = "rx", "tx"; status = "disabled"; }; @@ -703,7 +707,8 @@ lpuart6: serial@425a0000 { interrupts = ; clocks = <&clk IMX93_CLK_LPUART6_GATE>; clock-names = "ipg"; - dmas = <&edma2 24 0 1>, <&edma2 23 0 0>; + dmas = <&edma2 24 0 (FSL_EDMA_RX | FSL_EDMA_ODD_CH)>, + <&edma2 23 0 FSL_EDMA_EVEN_CH>; dma-names = "rx", "tx"; status = "disabled"; };