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[80.187.113.102]) by smtp.gmail.com with ESMTPSA id r25-20020a170906351900b00a1cc1be1146sm1096114eja.217.2023.12.08.07.08.48 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Fri, 08 Dec 2023 07:08:50 -0800 (PST) From: Luca Weiss Date: Fri, 08 Dec 2023 16:07:58 +0100 Subject: [PATCH v3 02/11] arm64: dts: qcom: sc7280: Remove unused second MPSS reg Precedence: bulk X-Mailing-List: devicetree@vger.kernel.org List-Id: List-Subscribe: List-Unsubscribe: MIME-Version: 1.0 Message-Id: <20231208-sc7280-remoteprocs-v3-2-6aa394d33edf@fairphone.com> References: <20231208-sc7280-remoteprocs-v3-0-6aa394d33edf@fairphone.com> In-Reply-To: <20231208-sc7280-remoteprocs-v3-0-6aa394d33edf@fairphone.com> To: Andy Gross , Bjorn Andersson , Konrad Dybcio , Mathieu Poirier , Rob Herring , Krzysztof Kozlowski , Conor Dooley , Manivannan Sadhasivam , cros-qcom-dts-watchers@chromium.org Cc: ~postmarketos/upstreaming@lists.sr.ht, phone-devel@vger.kernel.org, Krzysztof Kozlowski , Rob Herring , =?utf-8?q?Matti_Lehtim=C3=A4ki?= , linux-arm-msm@vger.kernel.org, linux-remoteproc@vger.kernel.org, devicetree@vger.kernel.org, linux-kernel@vger.kernel.org, Luca Weiss X-Mailer: b4 0.12.4 The bindings for sc7280-mpss-pas neither expects a second reg nor a reg-names property, which is only required by the sc7280-mss-pil bindings. Move it to sc7280-herobrine-lte-sku.dtsi, the only place where that other compatible is used. Reviewed-by: Krzysztof Kozlowski Signed-off-by: Luca Weiss --- arch/arm64/boot/dts/qcom/sc7280-herobrine-lte-sku.dtsi | 2 ++ arch/arm64/boot/dts/qcom/sc7280.dtsi | 3 +-- 2 files changed, 3 insertions(+), 2 deletions(-) diff --git a/arch/arm64/boot/dts/qcom/sc7280-herobrine-lte-sku.dtsi b/arch/arm64/boot/dts/qcom/sc7280-herobrine-lte-sku.dtsi index 95505549adcc..203274c10532 100644 --- a/arch/arm64/boot/dts/qcom/sc7280-herobrine-lte-sku.dtsi +++ b/arch/arm64/boot/dts/qcom/sc7280-herobrine-lte-sku.dtsi @@ -33,6 +33,8 @@ &ipa { &remoteproc_mpss { compatible = "qcom,sc7280-mss-pil"; + reg = <0 0x04080000 0 0x10000>, <0 0x04180000 0 0x48>; + reg-names = "qdsp6", "rmb"; clocks = <&gcc GCC_MSS_CFG_AHB_CLK>, <&gcc GCC_MSS_OFFLINE_AXI_CLK>, diff --git a/arch/arm64/boot/dts/qcom/sc7280.dtsi b/arch/arm64/boot/dts/qcom/sc7280.dtsi index 35208248f8cd..1b40e18ff152 100644 --- a/arch/arm64/boot/dts/qcom/sc7280.dtsi +++ b/arch/arm64/boot/dts/qcom/sc7280.dtsi @@ -2860,8 +2860,7 @@ adreno_smmu: iommu@3da0000 { remoteproc_mpss: remoteproc@4080000 { compatible = "qcom,sc7280-mpss-pas"; - reg = <0 0x04080000 0 0x10000>, <0 0x04180000 0 0x48>; - reg-names = "qdsp6", "rmb"; + reg = <0 0x04080000 0 0x10000>; interrupts-extended = <&intc GIC_SPI 264 IRQ_TYPE_LEVEL_HIGH>, <&modem_smp2p_in 0 IRQ_TYPE_EDGE_RISING>,