From patchwork Tue Nov 1 09:53:24 2016 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Sekhar Nori X-Patchwork-Id: 80317 Delivered-To: patch@linaro.org Received: by 10.140.97.247 with SMTP id m110csp540519qge; Tue, 1 Nov 2016 02:54:50 -0700 (PDT) X-Received: by 10.99.122.92 with SMTP id j28mr24202564pgn.64.1477994090226; Tue, 01 Nov 2016 02:54:50 -0700 (PDT) Return-Path: Received: from vger.kernel.org (vger.kernel.org. [209.132.180.67]) by mx.google.com with ESMTP id xg5si10172963pab.175.2016.11.01.02.54.50; Tue, 01 Nov 2016 02:54:50 -0700 (PDT) Received-SPF: pass (google.com: best guess record for domain of devicetree-owner@vger.kernel.org designates 209.132.180.67 as permitted sender) client-ip=209.132.180.67; Authentication-Results: mx.google.com; spf=pass (google.com: best guess record for domain of devicetree-owner@vger.kernel.org designates 209.132.180.67 as permitted sender) smtp.mailfrom=devicetree-owner@vger.kernel.org; dmarc=fail (p=NONE dis=NONE) header.from=ti.com Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S1168272AbcKAJys (ORCPT + 7 others); Tue, 1 Nov 2016 05:54:48 -0400 Received: from arroyo.ext.ti.com ([198.47.19.12]:32829 "EHLO arroyo.ext.ti.com" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S1034814AbcKAJys (ORCPT ); Tue, 1 Nov 2016 05:54:48 -0400 Received: from dflxv15.itg.ti.com ([128.247.5.124]) by arroyo.ext.ti.com (8.13.7/8.13.7) with ESMTP id uA19rTcd007582; Tue, 1 Nov 2016 04:53:30 -0500 Received: from DFLE72.ent.ti.com (dfle72.ent.ti.com [128.247.5.109]) by dflxv15.itg.ti.com (8.14.3/8.13.8) with ESMTP id uA19rTja027371; Tue, 1 Nov 2016 04:53:29 -0500 Received: from dflp33.itg.ti.com (10.64.6.16) by DFLE72.ent.ti.com (128.247.5.109) with Microsoft SMTP Server id 14.3.294.0; Tue, 1 Nov 2016 04:53:28 -0500 Received: from [172.24.190.171] (ileax41-snat.itg.ti.com [10.172.224.153]) by dflp33.itg.ti.com (8.14.3/8.13.8) with ESMTP id uA19rPN6016219; Tue, 1 Nov 2016 04:53:26 -0500 Subject: Re: [PATCH v8 1/3] ARM: dts: da850: Add cfgchip syscon node To: David Lechner , Rob Herring , Mark Rutland , Kevin Hilman References: <1477946841-16126-1-git-send-email-david@lechnology.com> <1477946841-16126-2-git-send-email-david@lechnology.com> CC: Axel Haslam , Bartosz Golaszewski , , , From: Sekhar Nori Message-ID: Date: Tue, 1 Nov 2016 15:23:24 +0530 User-Agent: Mozilla/5.0 (X11; Linux x86_64; rv:45.0) Gecko/20100101 Thunderbird/45.4.0 MIME-Version: 1.0 In-Reply-To: <1477946841-16126-2-git-send-email-david@lechnology.com> Sender: devicetree-owner@vger.kernel.org Precedence: bulk List-ID: X-Mailing-List: devicetree@vger.kernel.org Hi David, On Tuesday 01 November 2016 02:17 AM, David Lechner wrote: > Add a syscon node for the SoC CFGCHIPn registers. It includes a child node > for the USB PHY that is part of this range of registers. > > Also have to add OF_DEV_AUXDATA() entry so that clock lookup will work for > the the USB PHY driver. > > Signed-off-by: David Lechner For future, please do not combine device-tree addition and other C code into a single patch. I have applied this patch while splitting it into two as attached. Thanks, Sekhar ---8<--- From: David Lechner Date: Mon, 31 Oct 2016 15:47:19 -0500 Subject: [PATCH] ARM: dts: da850: Add cfgchip syscon node Add a syscon node for the SoC CFGCHIPn registers. It includes a child node for the USB PHY that is part of this range of registers. Signed-off-by: David Lechner [nsekhar@ti.com: drop OF_DEV_AUXDATA() addition] Signed-off-by: Sekhar Nori --- arch/arm/boot/dts/da850.dtsi | 10 ++++++++++ 1 file changed, 10 insertions(+) -- 2.9.0 -- To unsubscribe from this list: send the line "unsubscribe devicetree" in the body of a message to majordomo@vger.kernel.org More majordomo info at http://vger.kernel.org/majordomo-info.html diff --git a/arch/arm/boot/dts/da850.dtsi b/arch/arm/boot/dts/da850.dtsi index 4c836133a183..2534aab851e1 100644 --- a/arch/arm/boot/dts/da850.dtsi +++ b/arch/arm/boot/dts/da850.dtsi @@ -209,6 +209,16 @@ }; }; + cfgchip: chip-controller@1417c { + compatible = "ti,da830-cfgchip", "syscon", "simple-mfd"; + reg = <0x1417c 0x14>; + + usb_phy: usb-phy { + compatible = "ti,da830-usb-phy"; + #phy-cells = <1>; + status = "disabled"; + }; + }; edma0: edma@0 { compatible = "ti,edma3-tpcc"; /* eDMA3 CC0: 0x01c0 0000 - 0x01c0 7fff */ -- 2.9.0 ---8<--- From: David Lechner Date: Mon, 31 Oct 2016 15:47:19 -0500 Subject: [PATCH] ARM: davinci: da8xx-dt: add OF_DEV_AUXDATA entry for USB phy Add OF_DEV_AUXDATA() entry for USB phy. This is required for so that clock lookup will work for the USB PHY driver. Signed-off-by: David Lechner Signed-off-by: Sekhar Nori --- arch/arm/mach-davinci/da8xx-dt.c | 1 + 1 file changed, 1 insertion(+) diff --git a/arch/arm/mach-davinci/da8xx-dt.c b/arch/arm/mach-davinci/da8xx-dt.c index 0e45cbd57273..5e67618180a7 100644 --- a/arch/arm/mach-davinci/da8xx-dt.c +++ b/arch/arm/mach-davinci/da8xx-dt.c @@ -41,6 +41,7 @@ static struct of_dev_auxdata da850_auxdata_lookup[] __initdata = { OF_DEV_AUXDATA("ti,da850-tilcdc", 0x01e13000, "da8xx_lcdc.0", NULL), OF_DEV_AUXDATA("ti,da830-ohci", 0x01e25000, "ohci", NULL), OF_DEV_AUXDATA("ti,da830-musb", 0x01e00000, "musb-da8xx", NULL), + OF_DEV_AUXDATA("ti,da830-usb-phy", 0x01c1417c, "da8xx-usb-phy", NULL), {} };