From patchwork Sat May 15 16:53:10 2021 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Jonathan McDowell X-Patchwork-Id: 439541 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org X-Spam-Level: X-Spam-Status: No, score=-15.0 required=3.0 tests=BAYES_00,DKIM_INVALID, DKIM_SIGNED, HEADER_FROM_DIFFERENT_DOMAINS, INCLUDES_CR_TRAILER, INCLUDES_PATCH, MAILING_LIST_MULTI, SPF_HELO_NONE, SPF_PASS, URIBL_BLOCKED, USER_AGENT_SANE_1 autolearn=unavailable autolearn_force=no version=3.4.0 Received: from mail.kernel.org (mail.kernel.org [198.145.29.99]) by smtp.lore.kernel.org (Postfix) with ESMTP id 18307C433B4 for ; Sat, 15 May 2021 16:53:37 +0000 (UTC) Received: from vger.kernel.org (vger.kernel.org [23.128.96.18]) by mail.kernel.org (Postfix) with ESMTP id EB92E613B5 for ; Sat, 15 May 2021 16:53:36 +0000 (UTC) Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S233851AbhEOQyk (ORCPT ); Sat, 15 May 2021 12:54:40 -0400 Received: from lindbergh.monkeyblade.net ([23.128.96.19]:33206 "EHLO lindbergh.monkeyblade.net" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S233837AbhEOQyc (ORCPT ); Sat, 15 May 2021 12:54:32 -0400 X-Greylist: delayed 63 seconds by postgrey-1.37 at lindbergh.monkeyblade.net; Sat, 15 May 2021 09:53:18 PDT Received: from the.earth.li (the.earth.li [IPv6:2a00:1098:86:4d:c0ff:ee:15:900d]) by lindbergh.monkeyblade.net (Postfix) with ESMTPS id 55149C06174A; Sat, 15 May 2021 09:53:17 -0700 (PDT) DKIM-Signature: v=1; a=rsa-sha256; q=dns/txt; c=relaxed/relaxed; d=earth.li; s=the; h=In-Reply-To:Content-Type:MIME-Version:References:Message-ID:Subject :To:From:Date:Sender:Reply-To:Cc:Content-Transfer-Encoding:Content-ID: Content-Description:Resent-Date:Resent-From:Resent-Sender:Resent-To:Resent-Cc :Resent-Message-ID:List-Id:List-Help:List-Unsubscribe:List-Subscribe: List-Post:List-Owner:List-Archive; bh=8SHldVPRB3IgRIGvdvG9IQiPYuel04QK7Wt6vmIztp4=; b=bcvBSu5hwtNHXT67Bx9UlR5Eyk WPw8JXxiFyV+G8jxixsFDOSyZzb3QZZdCb2BQg0dZkpzBCu4X8cBXOoVyLIyr2R8JEAmHqdN1QUbO 49KGaSzYydpcXNG1uIU9CjpR9gKVpGoIhcEh/IEqbkwjyPTO9XGui85GK/vgf0C34eixgmnYzB0oB gTB72Bjb5FDXjL+lWbugRZiSWQ8pd/JjuIOOLjL0RJbkFiRLJsoxcwo2Ukcims8DxNA+8YUbo+AmY ang4uE4hmzPax+h2JPDN5XqrlS0h4KX4OKEdx+W7IhwTJNl5DGZstNwdxbfm88eco9/zgZWYK9x1o HOK+5RNg==; Received: from [2001:4d48:ad59:1409:4::2] (helo=youmian.o362.us) by the.earth.li with esmtpsa (TLS1.3:ECDHE_RSA_AES_256_GCM_SHA384:256) (Exim 4.92) (envelope-from ) id 1lhxXO-0004UW-Km; Sat, 15 May 2021 17:53:14 +0100 Date: Sat, 15 May 2021 17:53:10 +0100 From: Jonathan McDowell To: Andy Gross , Bjorn Andersson , Rob Herring , Ansuel Smith , linux-arm-msm@vger.kernel.org, devicetree@vger.kernel.org, linux-kernel@vger.kernel.org Subject: [PATCH 4/5] ARM: dts: qcom: add L2CC and RPM for IPQ8064 Message-ID: References: MIME-Version: 1.0 Content-Disposition: inline In-Reply-To: User-Agent: Mutt/1.10.1 (2018-07-13) Precedence: bulk List-ID: X-Mailing-List: devicetree@vger.kernel.org This adds the L2CC IPC resource and RPM devices to the IPQ8064 device tree. Tested on a Mikrotik RB3011. Signed-off-by: Jonathan McDowell --- arch/arm/boot/dts/qcom-ipq8064.dtsi | 29 +++++++++++++++++++++++++++++ 1 file changed, 29 insertions(+) diff --git a/arch/arm/boot/dts/qcom-ipq8064.dtsi b/arch/arm/boot/dts/qcom-ipq8064.dtsi index afa11acfb378..e4e3dc59c650 100644 --- a/arch/arm/boot/dts/qcom-ipq8064.dtsi +++ b/arch/arm/boot/dts/qcom-ipq8064.dtsi @@ -2,6 +2,8 @@ /dts-v1/; #include +#include +#include #include #include #include @@ -753,11 +755,38 @@ }; }; + rpm: rpm@108000 { + compatible = "qcom,rpm-ipq8064"; + reg = <0x108000 0x1000>; + qcom,ipc = <&l2cc 0x8 2>; + + interrupts = , + , + ; + interrupt-names = "ack", "err", "wakeup"; + + clocks = <&gcc RPM_MSG_RAM_H_CLK>; + clock-names = "ram"; + + rpmcc: clock-controller { + compatible = "qcom,rpmcc-ipq806x", "qcom,rpmcc"; + #clock-cells = <1>; + }; + }; + tcsr: syscon@1a400000 { compatible = "qcom,tcsr-ipq8064", "syscon"; reg = <0x1a400000 0x100>; }; + l2cc: clock-controller@2011000 { + compatible = "qcom,kpss-gcc", "syscon"; + reg = <0x2011000 0x1000>; + clocks = <&gcc PLL8_VOTE>, <&gcc PXO_SRC>; + clock-names = "pll8_vote", "pxo"; + clock-output-names = "acpu_l2_aux"; + }; + lcc: clock-controller@28000000 { compatible = "qcom,lcc-ipq8064"; reg = <0x28000000 0x1000>;