From patchwork Fri Jun 11 09:11:33 2021 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Cristian Ciocaltea X-Patchwork-Id: 458680 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org X-Spam-Level: X-Spam-Status: No, score=-15.8 required=3.0 tests=BAYES_00,DKIM_SIGNED, DKIM_VALID,DKIM_VALID_AU,FREEMAIL_FORGED_FROMDOMAIN,FREEMAIL_FROM, HEADER_FROM_DIFFERENT_DOMAINS,INCLUDES_CR_TRAILER,INCLUDES_PATCH, MAILING_LIST_MULTI, SPF_HELO_NONE, SPF_PASS, USER_AGENT_GIT autolearn=ham autolearn_force=no version=3.4.0 Received: from mail.kernel.org (mail.kernel.org [198.145.29.99]) by smtp.lore.kernel.org (Postfix) with ESMTP id 2B108C48BE0 for ; Fri, 11 Jun 2021 09:12:48 +0000 (UTC) Received: from vger.kernel.org (vger.kernel.org [23.128.96.18]) by mail.kernel.org (Postfix) with ESMTP id 13CFD613BC for ; Fri, 11 Jun 2021 09:12:48 +0000 (UTC) Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S230469AbhFKJOo (ORCPT ); Fri, 11 Jun 2021 05:14:44 -0400 Received: from mail-wm1-f43.google.com ([209.85.128.43]:53867 "EHLO mail-wm1-f43.google.com" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S231514AbhFKJOo (ORCPT ); Fri, 11 Jun 2021 05:14:44 -0400 Received: by mail-wm1-f43.google.com with SMTP id b205so2984498wmb.3; Fri, 11 Jun 2021 02:12:38 -0700 (PDT) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=gmail.com; s=20161025; h=from:to:cc:subject:date:message-id:in-reply-to:references :mime-version:content-transfer-encoding; bh=g7JY//B99DNoLLjgXO7WYK3oUumq/NbdPAMSrBSy1rE=; b=ji9nBoVzSNkdEoW0nLtDN28arisxrU+3RJTiQg3XvfEfifd5NUxVwS4PrW7rHkvsFA 1E4CJDktYpKD2ol03kGhM+48Cn4JIL5HIf12H5FcWW6AP/7bcpel43PrAJF7Kx0j2gD6 QWUR7Za/0M2ZhEYFfc9la++dbH+peIDbXUkBYqcMyxJGp1z7FP8eMvKr3WAnBhYw75Gk kKGdwDMeEQm9eDCZOOEjqYCTCKbU4Lj59LUZBT0/bUAE7QURbR9O8rkyZs1bX/2t+cic iEq1ucnZbZn19Nvfn+pPKkxsEyBH05A4lK97E53GkdLFExsCAnDWVtiSX5Mq3kNOAqpY b5wA== X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=1e100.net; s=20161025; h=x-gm-message-state:from:to:cc:subject:date:message-id:in-reply-to :references:mime-version:content-transfer-encoding; bh=g7JY//B99DNoLLjgXO7WYK3oUumq/NbdPAMSrBSy1rE=; b=U7eL/Xv1KygjDiLkasHYxmNiUYZDUD9rqekwMY017BmlINnAxbF72gPIr290IUJhJJ RTq5q4B7rkHrzk/pVFlPAFu20D89gqbTwePyUir76Y/Iwl59XsW1etX5WqYx8rs+zV1o vqABc7gJbFIUC5OA9XSopgTH8Q+ky/8R/P9d4obEuT8+qfvvc2sjdqL3XlmRhCaj+l5C HRAAMU9tfYILz9opU9liRGZFdBaeUomGXZTFdV7f+4kpfiUJndFrp+1wwr9wXJqmCQmH 1jXF1tKUR/dUC0QLAkPN8G9OfQ0RITQQp2EVeo6f6ZnVf2X+sN5YbBau9WFXuTWXcWVx qGlw== X-Gm-Message-State: AOAM532SGurGzN1o9rhfStzS4+dveQfpOCRWDa81KyMXE0b/3HYrbb02 SwRx8bltUrGor/c/kjD29PfF3xHSPik= X-Google-Smtp-Source: ABdhPJxHioZvrmg1B9mynbBoAhk0G9PhXpCfeyQxpkJMlf5qwq5PH+VkvK5OeqXb7ELJfqUS09vgVw== X-Received: by 2002:a1c:b087:: with SMTP id z129mr18833615wme.67.1623402697651; Fri, 11 Jun 2021 02:11:37 -0700 (PDT) Received: from localhost.localdomain ([188.24.178.25]) by smtp.gmail.com with ESMTPSA id l13sm6667737wrz.34.2021.06.11.02.11.36 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Fri, 11 Jun 2021 02:11:37 -0700 (PDT) From: Cristian Ciocaltea To: Rob Herring , =?utf-8?q?Andreas_F=C3=A4rber?= , Manivannan Sadhasivam Cc: devicetree@vger.kernel.org, linux-arm-kernel@lists.infradead.org, linux-actions@lists.infradead.org, linux-kernel@vger.kernel.org Subject: [PATCH v2 2/2] ARM: dts: owl-s500-roseapplepi: Add ethernet support Date: Fri, 11 Jun 2021 12:11:33 +0300 Message-Id: X-Mailer: git-send-email 2.32.0 In-Reply-To: References: MIME-Version: 1.0 Precedence: bulk List-ID: X-Mailing-List: devicetree@vger.kernel.org Add pinctrl configuration for enabling the Ethernet MAC on RoseapplePi SBC. Additionally, provide the necessary properties for the generic S500 ethernet node in order to setup PHY and MDIO. Signed-off-by: Cristian Ciocaltea Reviewed-by: Manivannan Sadhasivam --- arch/arm/boot/dts/owl-s500-roseapplepi.dts | 45 ++++++++++++++++++++++ 1 file changed, 45 insertions(+) diff --git a/arch/arm/boot/dts/owl-s500-roseapplepi.dts b/arch/arm/boot/dts/owl-s500-roseapplepi.dts index b8c5db2344aa..eb555f385283 100644 --- a/arch/arm/boot/dts/owl-s500-roseapplepi.dts +++ b/arch/arm/boot/dts/owl-s500-roseapplepi.dts @@ -225,6 +225,27 @@ bias1-pinconf { bias-pull-down; }; }; + + ethernet_pins: ethernet-pins { + eth_rmii-pinmux { + groups = "rmii_txd0_mfp", "rmii_txd1_mfp", + "rmii_rxd0_mfp", "rmii_rxd1_mfp", + "rmii_txen_mfp", "rmii_rxen_mfp", + "rmii_crs_dv_mfp", "rmii_ref_clk_mfp"; + function = "eth_rmii"; + }; + + phy_clk-pinmux { + groups = "clko_25m_mfp"; + function = "clko_25m"; + }; + + ref_clk-pinconf { + groups = "rmii_ref_clk_drv"; + drive-strength = <2>; + }; + + }; }; /* uSD */ @@ -241,6 +262,30 @@ &mmc0 { vqmmc-supply = <&sd_vcc>; }; +ðernet { + pinctrl-names = "default"; + pinctrl-0 = <ðernet_pins>; + phy-mode = "rmii"; + phy-handle = <ð_phy>; + status = "okay"; + + mdio { + #address-cells = <1>; + #size-cells = <0>; + + reset-gpios = <&pinctrl 88 GPIO_ACTIVE_LOW>; /* GPIOC24 */ + reset-delay-us = <10000>; + reset-post-delay-us = <150000>; + + eth_phy: ethernet-phy@3 { + reg = <0x3>; + max-speed = <100>; + interrupt-parent = <&sirq>; + interrupts = <0 IRQ_TYPE_LEVEL_LOW>; + }; + }; +}; + &twd_timer { status = "okay"; };