From patchwork Mon Feb 18 12:35:15 2019 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Amit Kucheria X-Patchwork-Id: 158602 Delivered-To: patch@linaro.org Received: by 2002:a02:48:0:0:0:0:0 with SMTP id 69csp2439597jaa; Mon, 18 Feb 2019 04:35:45 -0800 (PST) X-Google-Smtp-Source: AHgI3IarjEsJ2xGWQpDuimwtQ9WwWZ/cs0aaAQ2IV5CH36C+VLRI9r7oYMLMTMkbwCGdN1cjd7mM X-Received: by 2002:a63:7909:: with SMTP id u9mr18963517pgc.243.1550493345530; Mon, 18 Feb 2019 04:35:45 -0800 (PST) ARC-Seal: i=1; a=rsa-sha256; t=1550493345; cv=none; d=google.com; s=arc-20160816; b=dFFbrfJ0mChDSz/EqwOJ804u5Uutk4OP9GQFymca9EMuUX3P6DfKbPD6GOL2wNbk3y axgQLcNeEYIGUGjVzts3G5jBI8wbh6ih1WCYtQKq4PzM+xVv7Iq9ESnwyhP8erQD2ob4 KUc5M7vzv6wPhp/2Bbyp7gHT2PrX2abAraMQ4SyJnn888REPYj7ecj5iEgJX6AIdQkHL hB/s/XqUIUHQop8lz+bKOLv7pcaiYXhNCyHfpoZ5oB/A1yNEsaHZ92RAsLJltWsx3FDY YlAegAGxzoZ5kpoFXb+EtPWIyj1mVCBTkPaJ1MUHYLUb3qUVtc57zIOxOqDczU8v9ql/ n2vQ== ARC-Message-Signature: i=1; a=rsa-sha256; c=relaxed/relaxed; d=google.com; s=arc-20160816; h=list-id:precedence:sender:references:in-reply-to:references :in-reply-to:message-id:date:subject:cc:to:from:dkim-signature; bh=KnqYkmaJQ2W98ZpgcSTL8cYq3Ka1/vJpxLFa+DKrwvs=; b=ALnV0tEPYJRFO3r3QKJuJQuVS5G3lsCmGj7qZM6czgQUqXCFH8YT2YmLVFIXurae/Q akdoB/OC81sKA1yfeuRsamgmTd2EaD2PQ06D5rzgoNkQvS+Mr/0FBrfIN7KP6sBIux6d zz54hYPIHVFVTDYC/q72M2lhY9Ir4oyLDeJO3QBL7geIEYTlrTzRTqVxj8vu+P8Ibo42 sxWY6+ssEtvl+JPlMPy63fNHu13MrSJMGD47oRDQnp9wN2lA1ZUBHzd3xvx3WYfgaliH 7YdjfF0Nuhis7MFIFvd147SyvM6oKpVagEqwoQPOtEWk5lZKTNHGDaAMclO/NpE87Fzv 0t8A== ARC-Authentication-Results: i=1; mx.google.com; dkim=pass header.i=@linaro.org header.s=google header.b=cnBIEaGT; spf=pass (google.com: best guess record for domain of devicetree-owner@vger.kernel.org designates 209.132.180.67 as permitted sender) smtp.mailfrom=devicetree-owner@vger.kernel.org; dmarc=pass (p=NONE sp=NONE dis=NONE) header.from=linaro.org Return-Path: Received: from vger.kernel.org (vger.kernel.org. [209.132.180.67]) by mx.google.com with ESMTP id j10si10944984plk.238.2019.02.18.04.35.45; Mon, 18 Feb 2019 04:35:45 -0800 (PST) Received-SPF: pass (google.com: best guess record for domain of devicetree-owner@vger.kernel.org designates 209.132.180.67 as permitted sender) client-ip=209.132.180.67; Authentication-Results: mx.google.com; dkim=pass header.i=@linaro.org header.s=google header.b=cnBIEaGT; spf=pass (google.com: best guess record for domain of devicetree-owner@vger.kernel.org designates 209.132.180.67 as permitted sender) smtp.mailfrom=devicetree-owner@vger.kernel.org; dmarc=pass (p=NONE sp=NONE dis=NONE) header.from=linaro.org Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S1730366AbfBRMfo (ORCPT + 7 others); Mon, 18 Feb 2019 07:35:44 -0500 Received: from mail-wm1-f65.google.com ([209.85.128.65]:38170 "EHLO mail-wm1-f65.google.com" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S1729767AbfBRMfo (ORCPT ); Mon, 18 Feb 2019 07:35:44 -0500 Received: by mail-wm1-f65.google.com with SMTP id v26so16934918wmh.3 for ; Mon, 18 Feb 2019 04:35:43 -0800 (PST) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=linaro.org; s=google; h=from:to:cc:subject:date:message-id:in-reply-to:references :in-reply-to:references; bh=KnqYkmaJQ2W98ZpgcSTL8cYq3Ka1/vJpxLFa+DKrwvs=; b=cnBIEaGT3S5Zm71+w6jkC8Ao6jj9Ck74dbdz6evQWOhloel+fmOSqF/vQpEDbmM0so WT9OQNNg50Vb3PO4hAHniS07F8Hq2ypcJpJ9iioD0RY8qt5ocl4H2WdhpjMNVd6ewOMo jWhX+7ebSt98fZah4Tf09J+kslYEX8IKCT1G6M0P92UsdJ1Vp1Ku9+Ywz6R02HqRKnqy R9IyobJ/RiQVnLn1dAGkkByy9j30VDifQode+zuaFo9GMJ2jwJVIQeJy8P+S3gogscZc TaMhnSXTesg1pRSrFccRyXG36+3Cg+J3b2mxYodM+EiS0S+6r1BULYLlu0he/2wf1ZbS Zrpg== X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=1e100.net; s=20161025; h=x-gm-message-state:from:to:cc:subject:date:message-id:in-reply-to :references:in-reply-to:references; bh=KnqYkmaJQ2W98ZpgcSTL8cYq3Ka1/vJpxLFa+DKrwvs=; b=Kvx9ZeSu72XMRoxRpxYPKTHxIQ/r57GvOlN8Ie2U7RlT1vRaQuNvCvUohdGd3gJuzM H7shGdkiZy7X08IOOIMzt5ZM1n09rWUlH2Hm4GGY+waguzJUOvnmQ1KugfXuay5m3USs /GleU1okJ/yH5RPSaaR4ULYFuBxO4J5Jm5X27vd8VeN4kdL+oxDSu11TEU7fAO+hOs30 5gqrgFiyCz88FaQ4JBc6jVJj0iqXQQcC8CyBX7HcEkwjKlGP22cKFWoBwh0pGp79EvS5 Rnooy/xb7/UlbgwWRRHA+HWIFrNUpb2Tayo7riFR+UyB4o7tSsnl06RN/OwnJFBVcAtY j9xg== X-Gm-Message-State: AHQUAuYrT7sfRVYO23xaUyp8CJn7xGFgecytI988Gn2hM2xZwxrdik2i HkJD97hrqGoxYRlCd5wm44bXfA== X-Received: by 2002:a1c:6c0c:: with SMTP id h12mr10339729wmc.35.1550493342790; Mon, 18 Feb 2019 04:35:42 -0800 (PST) Received: from localhost ([49.248.190.152]) by smtp.gmail.com with ESMTPSA id u12sm10040467wrt.2.2019.02.18.04.35.40 (version=TLS1_2 cipher=ECDHE-RSA-CHACHA20-POLY1305 bits=256/256); Mon, 18 Feb 2019 04:35:42 -0800 (PST) From: Amit Kucheria To: linux-kernel@vger.kernel.org, linux-arm-msm@vger.kernel.org, bjorn.andersson@linaro.org, edubezval@gmail.com, andy.gross@linaro.org, David Brown Cc: devicetree@vger.kernel.org Subject: [PATCH v1 01/12] arm64: dts: msm8998: thermal: split address space into two Date: Mon, 18 Feb 2019 18:05:15 +0530 Message-Id: X-Mailer: git-send-email 2.17.1 In-Reply-To: References: In-Reply-To: References: Sender: devicetree-owner@vger.kernel.org Precedence: bulk List-ID: X-Mailing-List: devicetree@vger.kernel.org We've earlier added support to split the register address space into TM and SROT regions. Split up the regmap address space into two for msm8998 that has a similar register layout. The order is important (TM before SROT) because we make an assumption that SROT is always the second address space in order to support legacy DTs. Signed-off-by: Amit Kucheria --- arch/arm64/boot/dts/qcom/msm8998.dtsi | 10 ++++++---- 1 file changed, 6 insertions(+), 4 deletions(-) -- 2.17.1 diff --git a/arch/arm64/boot/dts/qcom/msm8998.dtsi b/arch/arm64/boot/dts/qcom/msm8998.dtsi index 8d41b69ec2da..3c5fb2509d5f 100644 --- a/arch/arm64/boot/dts/qcom/msm8998.dtsi +++ b/arch/arm64/boot/dts/qcom/msm8998.dtsi @@ -579,17 +579,19 @@ cell-index = <0>; }; - tsens0: thermal@10aa000 { + tsens0: thermal@10ab000 { compatible = "qcom,msm8998-tsens", "qcom,tsens-v2"; - reg = <0x10aa000 0x2000>; + reg = <0x10ab000 0x1000>, /* TM */ + <0x10aa000 0x1000>; /* SROT */ #qcom,sensors = <12>; #thermal-sensor-cells = <1>; }; - tsens1: thermal@10ad000 { + tsens1: thermal@10ae000 { compatible = "qcom,msm8998-tsens", "qcom,tsens-v2"; - reg = <0x10ad000 0x2000>; + reg = <0x10ae000 0x1000>, /* TM */ + <0x10ad000 0x1000>; /* SROT */ #qcom,sensors = <8>; #thermal-sensor-cells = <1>;