From patchwork Sun Oct 15 20:12:35 2023 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Dorcas Litunya X-Patchwork-Id: 734148 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org Received: from vger.kernel.org (vger.kernel.org [23.128.96.18]) by smtp.lore.kernel.org (Postfix) with ESMTP id 9EFC7CDB47E for ; Sun, 15 Oct 2023 20:15:12 +0000 (UTC) Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S230261AbjJOUPM (ORCPT ); Sun, 15 Oct 2023 16:15:12 -0400 Received: from lindbergh.monkeyblade.net ([23.128.96.19]:59844 "EHLO lindbergh.monkeyblade.net" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S230156AbjJOUPL (ORCPT ); Sun, 15 Oct 2023 16:15:11 -0400 Received: from mail-ed1-x52a.google.com (mail-ed1-x52a.google.com [IPv6:2a00:1450:4864:20::52a]) by lindbergh.monkeyblade.net (Postfix) with ESMTPS id 2E61BB7; Sun, 15 Oct 2023 13:15:10 -0700 (PDT) Received: by mail-ed1-x52a.google.com with SMTP id 4fb4d7f45d1cf-53e3b8f906fso4199340a12.2; Sun, 15 Oct 2023 13:15:10 -0700 (PDT) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=gmail.com; s=20230601; t=1697400908; x=1698005708; darn=vger.kernel.org; h=content-transfer-encoding:mime-version:references:in-reply-to :message-id:date:subject:cc:to:from:from:to:cc:subject:date :message-id:reply-to; bh=QXTa2gL9HBai55IcBL1BTntgkzuJUdmD/v5gCocZbHs=; b=e7R5dt+FbP42D1zSxDvrstvkPrVR0CkduPDvESQzrgXahf8RvRp4EohVzKa0vLOsi3 j4taQJcA7J1vpdA+/VmnGG+pCvykXeQhxblQNlI7Q57bpBgbqz5CyuXzt6BH/80/KnRU 4Q+oM113ua0JvT3FcnK65b/KnJm0vTzYZ/GkmlX5iGEsh/2KrcMjmZSSOjai6lFKbe/D 40UcbG8m0409PyMsOSDZRGs2oZ9EdB+IUTZOZKKMKmUx75KsAzORfScKGmX0jjCCA6oH eWJaDqxjVDFk9XpkEPiUA9rMwxvbLJYHXCYlOTqn+qbFsNnMzEfwbNZdDo1/7bKeAuqv K9tQ== X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=1e100.net; s=20230601; t=1697400908; x=1698005708; h=content-transfer-encoding:mime-version:references:in-reply-to :message-id:date:subject:cc:to:from:x-gm-message-state:from:to:cc :subject:date:message-id:reply-to; bh=QXTa2gL9HBai55IcBL1BTntgkzuJUdmD/v5gCocZbHs=; b=YW/IgsezBy3b88t4CXMqVOgftBIEL9srtoFugF0hwYKakaU5qyz9elHpTT9FGmJ7tJ O41mSerRkasiACovBDC57GIL5RK38ggwVGfYbsWv93TXaDox46sx6EDZTYetas6jn0Pl 34OccaTuOeyfBiXJIx2kA6U4wbXATdMUw2HG5OCYXEwSM84yonDXAmS8CRtC+sTRZSS9 zvAX+jnTU5Ci2dPxmfOK8KVd7e+3ZcfKiNDJ/mnal+FUo89VsY3TNAFhOpSWVJcrbWKw +mGzDptEqVOZZK2SgHQSkiX9sXzNQdORHLliawgNOXZXmbbu2EE2uwML9WpEFXitZ7WM u6yA== X-Gm-Message-State: AOJu0YwuAJqmKRD6Edzd/wwTi1gqNxmCbjDGnBPcndHmWnl3DqRykrhU aAwX94Qn/jYiptO2BgscZA== X-Google-Smtp-Source: AGHT+IETPtm5unk77kgqFdIgB+l/ZOGyPbpxXd+Uhi+vj3W4vbJora6mEHU5R3B5breKXMk+NpeKgg== X-Received: by 2002:a17:907:869e:b0:9bd:9bfe:e410 with SMTP id qa30-20020a170907869e00b009bd9bfee410mr7301558ejc.72.1697400908491; Sun, 15 Oct 2023 13:15:08 -0700 (PDT) Received: from dorcaslitunya-virtual-machine.localdomain ([105.163.157.6]) by smtp.gmail.com with ESMTPSA id m10-20020a170906234a00b009ae587ce133sm2721766eja.188.2023.10.15.13.15.05 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Sun, 15 Oct 2023 13:15:08 -0700 (PDT) From: Dorcas AnonoLitunya Cc: anonolitunya@gmail.com, outreachy@lists.linux.dev, Sudip Mukherjee , Teddy Wang , Greg Kroah-Hartman , linux-fbdev@vger.kernel.org, linux-staging@lists.linux.dev, linux-kernel@vger.kernel.org Subject: [PATCH 2/5] Staging: sm750fb: Rename pModeParam Date: Sun, 15 Oct 2023 23:12:35 +0300 Message-ID: <38ca20478a21d770f3a0b6f5478d06b67510492e.1697400022.git.anonolitunya@gmail.com> X-Mailer: git-send-email 2.42.0.345.gaab89be2eb In-Reply-To: References: MIME-Version: 1.0 To: unlisted-recipients:; (no To-header on input) Precedence: bulk List-ID: X-Mailing-List: linux-fbdev@vger.kernel.org Rename variable pModeParam to mode_param.This follows snakecase naming convention and ensures consistent naming style throughout the file.Issue by checkpatch. Mutes the following checkpatch error: CHECK: Avoid CamelCase: Signed-off-by: Dorcas AnonoLitunya --- drivers/staging/sm750fb/ddk750_mode.c | 52 +++++++++++++-------------- 1 file changed, 26 insertions(+), 26 deletions(-) diff --git a/drivers/staging/sm750fb/ddk750_mode.c b/drivers/staging/sm750fb/ddk750_mode.c index 8708995f676c..431b273a347a 100644 --- a/drivers/staging/sm750fb/ddk750_mode.c +++ b/drivers/staging/sm750fb/ddk750_mode.c @@ -14,13 +14,13 @@ * in bit 29:27 of Display Control register. */ static unsigned long -display_control_adjust_SM750LE(struct mode_parameter *pModeParam, +display_control_adjust_SM750LE(struct mode_parameter *mode_param, unsigned long dispControl) { unsigned long x, y; - x = pModeParam->horizontal_display_end; - y = pModeParam->vertical_display_end; + x = mode_param->horizontal_display_end; + y = mode_param->vertical_display_end; /* * SM750LE has to set up the top-left and bottom-right @@ -75,7 +75,7 @@ display_control_adjust_SM750LE(struct mode_parameter *pModeParam, } /* only timing related registers will be programed */ -static int programModeRegisters(struct mode_parameter *pModeParam, +static int programModeRegisters(struct mode_parameter *mode_param, struct pll_value *pll) { int ret = 0; @@ -86,46 +86,46 @@ static int programModeRegisters(struct mode_parameter *pModeParam, /* programe secondary pixel clock */ poke32(CRT_PLL_CTRL, sm750_format_pll_reg(pll)); - tmp = ((pModeParam->horizontal_total - 1) << + tmp = ((mode_param->horizontal_total - 1) << CRT_HORIZONTAL_TOTAL_TOTAL_SHIFT) & CRT_HORIZONTAL_TOTAL_TOTAL_MASK; - tmp |= (pModeParam->horizontal_display_end - 1) & + tmp |= (mode_param->horizontal_display_end - 1) & CRT_HORIZONTAL_TOTAL_DISPLAY_END_MASK; poke32(CRT_HORIZONTAL_TOTAL, tmp); - tmp = (pModeParam->horizontal_sync_width << + tmp = (mode_param->horizontal_sync_width << CRT_HORIZONTAL_SYNC_WIDTH_SHIFT) & CRT_HORIZONTAL_SYNC_WIDTH_MASK; - tmp |= (pModeParam->horizontal_sync_start - 1) & + tmp |= (mode_param->horizontal_sync_start - 1) & CRT_HORIZONTAL_SYNC_START_MASK; poke32(CRT_HORIZONTAL_SYNC, tmp); - tmp = ((pModeParam->vertical_total - 1) << + tmp = ((mode_param->vertical_total - 1) << CRT_VERTICAL_TOTAL_TOTAL_SHIFT) & CRT_VERTICAL_TOTAL_TOTAL_MASK; - tmp |= (pModeParam->vertical_display_end - 1) & + tmp |= (mode_param->vertical_display_end - 1) & CRT_VERTICAL_TOTAL_DISPLAY_END_MASK; poke32(CRT_VERTICAL_TOTAL, tmp); - tmp = ((pModeParam->vertical_sync_height << + tmp = ((mode_param->vertical_sync_height << CRT_VERTICAL_SYNC_HEIGHT_SHIFT)) & CRT_VERTICAL_SYNC_HEIGHT_MASK; - tmp |= (pModeParam->vertical_sync_start - 1) & + tmp |= (mode_param->vertical_sync_start - 1) & CRT_VERTICAL_SYNC_START_MASK; poke32(CRT_VERTICAL_SYNC, tmp); tmp = DISPLAY_CTRL_TIMING | DISPLAY_CTRL_PLANE; - if (pModeParam->vertical_sync_polarity) + if (mode_param->vertical_sync_polarity) tmp |= DISPLAY_CTRL_VSYNC_PHASE; - if (pModeParam->horizontal_sync_polarity) + if (mode_param->horizontal_sync_polarity) tmp |= DISPLAY_CTRL_HSYNC_PHASE; if (sm750_get_chip_type() == SM750LE) { - display_control_adjust_SM750LE(pModeParam, tmp); + display_control_adjust_SM750LE(mode_param, tmp); } else { reg = peek32(CRT_DISPLAY_CTRL) & ~(DISPLAY_CTRL_VSYNC_PHASE | @@ -140,40 +140,40 @@ static int programModeRegisters(struct mode_parameter *pModeParam, poke32(PANEL_PLL_CTRL, sm750_format_pll_reg(pll)); - reg = ((pModeParam->horizontal_total - 1) << + reg = ((mode_param->horizontal_total - 1) << PANEL_HORIZONTAL_TOTAL_TOTAL_SHIFT) & PANEL_HORIZONTAL_TOTAL_TOTAL_MASK; - reg |= ((pModeParam->horizontal_display_end - 1) & + reg |= ((mode_param->horizontal_display_end - 1) & PANEL_HORIZONTAL_TOTAL_DISPLAY_END_MASK); poke32(PANEL_HORIZONTAL_TOTAL, reg); poke32(PANEL_HORIZONTAL_SYNC, - ((pModeParam->horizontal_sync_width << + ((mode_param->horizontal_sync_width << PANEL_HORIZONTAL_SYNC_WIDTH_SHIFT) & PANEL_HORIZONTAL_SYNC_WIDTH_MASK) | - ((pModeParam->horizontal_sync_start - 1) & + ((mode_param->horizontal_sync_start - 1) & PANEL_HORIZONTAL_SYNC_START_MASK)); poke32(PANEL_VERTICAL_TOTAL, - (((pModeParam->vertical_total - 1) << + (((mode_param->vertical_total - 1) << PANEL_VERTICAL_TOTAL_TOTAL_SHIFT) & PANEL_VERTICAL_TOTAL_TOTAL_MASK) | - ((pModeParam->vertical_display_end - 1) & + ((mode_param->vertical_display_end - 1) & PANEL_VERTICAL_TOTAL_DISPLAY_END_MASK)); poke32(PANEL_VERTICAL_SYNC, - ((pModeParam->vertical_sync_height << + ((mode_param->vertical_sync_height << PANEL_VERTICAL_SYNC_HEIGHT_SHIFT) & PANEL_VERTICAL_SYNC_HEIGHT_MASK) | - ((pModeParam->vertical_sync_start - 1) & + ((mode_param->vertical_sync_start - 1) & PANEL_VERTICAL_SYNC_START_MASK)); tmp = DISPLAY_CTRL_TIMING | DISPLAY_CTRL_PLANE; - if (pModeParam->vertical_sync_polarity) + if (mode_param->vertical_sync_polarity) tmp |= DISPLAY_CTRL_VSYNC_PHASE; - if (pModeParam->horizontal_sync_polarity) + if (mode_param->horizontal_sync_polarity) tmp |= DISPLAY_CTRL_HSYNC_PHASE; - if (pModeParam->clock_phase_polarity) + if (mode_param->clock_phase_polarity) tmp |= DISPLAY_CTRL_CLOCK_PHASE; reserved = PANEL_DISPLAY_CTRL_RESERVED_MASK |