From patchwork Tue Oct 10 17:27:17 2023 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 8bit X-Patchwork-Submitter: =?utf-8?q?Duje_Mihanovi=C4=87?= X-Patchwork-Id: 731688 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org Received: from vger.kernel.org (vger.kernel.org [23.128.96.18]) by smtp.lore.kernel.org (Postfix) with ESMTP id 2A5CDCD8CB1 for ; Tue, 10 Oct 2023 17:27:40 +0000 (UTC) Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S233993AbjJJR1j (ORCPT ); Tue, 10 Oct 2023 13:27:39 -0400 Received: from lindbergh.monkeyblade.net ([23.128.96.19]:42668 "EHLO lindbergh.monkeyblade.net" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S233965AbjJJR1h (ORCPT ); Tue, 10 Oct 2023 13:27:37 -0400 Received: from mx.skole.hr (mx1.hosting.skole.hr [161.53.165.185]) by lindbergh.monkeyblade.net (Postfix) with ESMTPS id 25B83B6; Tue, 10 Oct 2023 10:27:34 -0700 (PDT) Received: from mx1.hosting.skole.hr (localhost.localdomain [127.0.0.1]) by mx.skole.hr (mx.skole.hr) with ESMTP id 288B885166; Tue, 10 Oct 2023 19:27:31 +0200 (CEST) From: =?utf-8?q?Duje_Mihanovi=C4=87?= Subject: [PATCH v6 0/9] Initial Marvell PXA1908 support Date: Tue, 10 Oct 2023 19:27:17 +0200 Message-Id: <20231010-pxa1908-lkml-v6-0-b2fe09240cf8@skole.hr> MIME-Version: 1.0 X-B4-Tracking: v=1; b=H4sIAHWJJWUC/4XOQW7DIBCF4atErIs1MGAgq96j6oLApKZx4ggSl Cry3UsiVXW96XJG+n69OyuUExW23dxZpppKmk7t6F82LAz+9EE8xXYzCRLBAvLzzQsHlo+H48h 7i0A2eqWDYY2cM+3T7Zl7e2/3kMplyl/PesXH9yek/oYqcuCWlN0Hjwacey2HaaRuyOzRqfLXG mlELx24rgcUXPB4/aTumNraqaawgmIJhRQASnZSaNT/SbWca1ZzVZsbdmhNNLhTWq6sXlghV1Y 363XUwqEhQrWw8zx/A+wbGIWSAQAA To: Michael Turquette , Stephen Boyd , Linus Walleij , Rob Herring , Krzysztof Kozlowski , Conor Dooley , Tony Lindgren , Haojian Zhuang , Lubomir Rintel , Catalin Marinas , Will Deacon , Kees Cook , Tony Luck , "Guilherme G. Piccoli" Cc: linux-clk@vger.kernel.org, linux-kernel@vger.kernel.org, linux-gpio@vger.kernel.org, devicetree@vger.kernel.org, linux-arm-kernel@lists.infradead.org, linux-omap@vger.kernel.org, linux-hardening@vger.kernel.org, =?utf-8?q?Duje_Mihanovi=C4=87?= , Andy Shevchenko , Conor Dooley , Krzysztof Kozlowski X-Mailer: b4 0.12.3 X-Developer-Signature: v=1; a=openpgp-sha256; l=6106; i=duje.mihanovic@skole.hr; h=from:subject:message-id; bh=T3rpe82zRF01j6D68dx4WclHnTLGTWjakaB4Y9bJpKo=; b=owEBbQKS/ZANAwAIAZoRnrBCLZbhAcsmYgBlJYl4Evmb1SA8NsudpzA1GlmN6aqcK+wD3iy3I 28kejfxU76JAjMEAAEIAB0WIQRT351NnD/hEPs2LXiaEZ6wQi2W4QUCZSWJeAAKCRCaEZ6wQi2W 4d9qEACnEDJWMMgThh7WXvHb0e/yWwWmkNkF1VyRowtA4hwtTLJU6D78nHV8Ud8gP2ZeHcWwd9h eYCe+Ka/H5pP8NEI8Spu/d3aLlia5pUdkKWKuJJyI45v3WIZmh6uqW+vzaKeopB/WwPmmSIo8oL tq6XcdumM2vDz0ThGBzJHSQN/q5dXgvwY8zwLlMKRzgTjG0Dfal6jhlRjuQ0H2jRSdKQqUA8rbH EBu7Pk1/6WmV84x3s7qSkXkgJc617uYGyrQLdSblL4MAH+eCxIFh8oz7HJ3HcqbMtwLSbEWrQfd PiWEilY2QKMUy0U+XBkGeoRRj0MgPAltvPJrOo+Aa5vUPKaH8uVARtsfnclgklup7Iymi+V1KoY 639Vz9jl2ufhM5wo2qTtx4z9TBx6PBS1CrEniJrArHzJpJZb+jcYbsoGFLP8Sjg5oGT/HDM0HQ4 m+97sTdltY+CaRZqd9lyxIGtKRlQ2SH3ZFYL1eIBRAeltc2u5rZ8G3drTmLL7sMmIMMyRkwGUTt HKezowMYdCgUiCJ8VeLGAK32MJIZa4JezyFNXofGd+8PigoT4sXy88G0VslWVsdXt7KhHYukzqt PUtlmw8XHNhJntR4QoDDa6YZS7yIYgAtmiavmDSIoe163htP/xzkAT27JVoVfcvtnwYCzDQrLlL LqMt9bJ1BTwvdAw== X-Developer-Key: i=duje.mihanovic@skole.hr; a=openpgp; fpr=53DF9D4D9C3FE110FB362D789A119EB0422D96E1 Precedence: bulk List-ID: X-Mailing-List: linux-gpio@vger.kernel.org Hello, This series adds initial support for the Marvell PXA1908 SoC and "samsung,coreprimevelte", a smartphone using the SoC. USB works and the phone can boot a rootfs from an SD card, but there are some warnings in the dmesg: During SMP initialization: [ 0.006519] CPU features: SANITY CHECK: Unexpected variation in SYS_CNTFRQ_EL0. Boot CPU: 0x000000018cba80, CPU1: 0x00000000000000 [ 0.006542] CPU features: Unsupported CPU feature variation detected. [ 0.006589] CPU1: Booted secondary processor 0x0000000001 [0x410fd032] [ 0.010710] Detected VIPT I-cache on CPU2 [ 0.010716] CPU features: SANITY CHECK: Unexpected variation in SYS_CNTFRQ_EL0. Boot CPU: 0x000000018cba80, CPU2: 0x00000000000000 [ 0.010758] CPU2: Booted secondary processor 0x0000000002 [0x410fd032] [ 0.014849] Detected VIPT I-cache on CPU3 [ 0.014855] CPU features: SANITY CHECK: Unexpected variation in SYS_CNTFRQ_EL0. Boot CPU: 0x000000018cba80, CPU3: 0x00000000000000 [ 0.014895] CPU3: Booted secondary processor 0x0000000003 [0x410fd032] SMMU probing fails: [ 0.101798] arm-smmu c0010000.iommu: probing hardware configuration... [ 0.101809] arm-smmu c0010000.iommu: SMMUv1 with: [ 0.101816] arm-smmu c0010000.iommu: no translation support! On Samsung's PXA1908 phones, the bootloader does not start the ARM system timer, and my temporary solution (which isn't present in this series) was to put the code for starting the timer in the clock driver. Would this hack be accepted upstream in the form of a platform or clocksource driver such as drivers/clocksource/timer-mediatek-cpux.c? A 3.14 based Marvell tree is available on GitHub acorn-marvell/brillo_pxa_kernel, and a Samsung one on GitHub CoderCharmander/g361f-kernel. Andreas Färber attempted to upstream support for this SoC in 2017: https://lore.kernel.org/lkml/20170222022929.10540-1-afaerber@suse.de/ Signed-off-by: Duje Mihanović Changes in v6: - Address maintainer comments: - Add "marvell,pxa1908-padconf" binding to pinctrl-single driver - Drop GPIO patch as it's been pulled - Update trailers - Rebase on v6.6-rc5 - Link to v5: https://lore.kernel.org/r/20230812-pxa1908-lkml-v5-0-a5d51937ee34@skole.hr Changes in v5: - Address maintainer comments: - Move *_NR_CLKS to clock driver from dt binding file - Allocate correct number of clocks for each block instead of blindly allocating 50 for each - Link to v4: https://lore.kernel.org/r/20230807-pxa1908-lkml-v4-0-cb387d73b452@skole.hr Changes in v4: - Address maintainer comments: - Relicense clock binding file to BSD-2 - Add pinctrl-names to SD card node - Add vgic registers to GIC node - Rebase on v6.5-rc5 - Link to v3: https://lore.kernel.org/r/20230804-pxa1908-lkml-v3-0-8e48fca37099@skole.hr Changes in v3: - Address maintainer comments: - Drop GPIO dynamic allocation patch - Move clock register offsets into driver (instead of bindings file) - Add missing Tested-by trailer to u32_fract patch - Move SoC binding to arm/mrvl/mrvl.yaml - Add serial0 alias and stdout-path to board dts to enable UART debugging - Rebase on v6.5-rc4 - Link to v2: https://lore.kernel.org/r/20230727162909.6031-1-duje.mihanovic@skole.hr Changes in v2: - Remove earlycon patch as it's been merged into tty-next - Address maintainer comments: - Clarify GPIO regressions on older PXA platforms - Add Fixes tag to commit disabling GPIO pinctrl calls for this SoC - Add missing includes to clock driver - Clock driver uses HZ_PER_MHZ, u32_fract and GENMASK - Dual license clock bindings - Change clock IDs to decimal - Fix underscores in dt node names - Move chosen node to top of board dts - Clean up documentation - Reorder commits - Drop pxa,rev-id - Rename muic-i2c to i2c-muic - Reword some commits - Move framebuffer node to chosen - Add aliases for mmc nodes - Rebase on v6.5-rc3 - Link to v1: https://lore.kernel.org/r/20230721210042.21535-1-duje.mihanovic@skole.hr --- Andy Shevchenko (1): clk: mmp: Switch to use struct u32_fract instead of custom one Duje Mihanović (8): dt-bindings: pinctrl: pinctrl-single: add marvell,pxa1908-padconf compatible pinctrl: single: add marvell,pxa1908-padconf compatible dt-bindings: clock: Add Marvell PXA1908 clock bindings clk: mmp: Add Marvell PXA1908 clock driver dt-bindings: marvell: Document PXA1908 SoC arm64: Kconfig.platforms: Add config for Marvell PXA1908 platform arm64: dts: Add DTS for Marvell PXA1908 and samsung,coreprimevelte MAINTAINERS: add myself as Marvell PXA1908 maintainer .../devicetree/bindings/arm/mrvl/mrvl.yaml | 5 + .../devicetree/bindings/clock/marvell,pxa1908.yaml | 48 +++ .../bindings/pinctrl/pinctrl-single.yaml | 4 + MAINTAINERS | 9 + arch/arm64/Kconfig.platforms | 11 + arch/arm64/boot/dts/marvell/Makefile | 3 + .../dts/marvell/pxa1908-samsung-coreprimevelte.dts | 333 +++++++++++++++++++++ arch/arm64/boot/dts/marvell/pxa1908.dtsi | 295 ++++++++++++++++++ drivers/clk/mmp/Makefile | 2 +- drivers/clk/mmp/clk-frac.c | 57 ++-- drivers/clk/mmp/clk-of-mmp2.c | 26 +- drivers/clk/mmp/clk-of-pxa168.c | 4 +- drivers/clk/mmp/clk-of-pxa1908.c | 328 ++++++++++++++++++++ drivers/clk/mmp/clk-of-pxa1928.c | 6 +- drivers/clk/mmp/clk-of-pxa910.c | 4 +- drivers/clk/mmp/clk.h | 10 +- drivers/pinctrl/pinctrl-single.c | 1 + include/dt-bindings/clock/marvell,pxa1908.h | 88 ++++++ 18 files changed, 1177 insertions(+), 57 deletions(-) --- base-commit: 94f6f0550c625fab1f373bb86a6669b45e9748b3 change-id: 20230803-pxa1908-lkml-6830e8da45c7 Best regards,