diff mbox series

[v6,6/7] clk: mediatek: add UART0 clock support

Message ID 1592480018-3340-7-git-send-email-hanks.chen@mediatek.com
State Accepted
Commit 804a892456b73604b7ecfb1b00a96a29f3d2aedf
Headers show
Series [v6,1/7] dt-bindings: pinctrl: add bindings for MediaTek MT6779 SoC | expand

Commit Message

Hanks Chen June 18, 2020, 11:33 a.m. UTC 
Add MT6779 UART0 clock support.

Signed-off-by: Hanks Chen <hanks.chen@mediatek.com>

Signed-off-by: mtk01761 <wendell.lin@mediatek.com>

---
 drivers/clk/mediatek/clk-mt6779.c |    2 ++
 1 file changed, 2 insertions(+)

-- 
1.7.9.5
diff mbox series

Patch

diff --git a/drivers/clk/mediatek/clk-mt6779.c b/drivers/clk/mediatek/clk-mt6779.c
index 9766ccc..6e0d3a1 100644
--- a/drivers/clk/mediatek/clk-mt6779.c
+++ b/drivers/clk/mediatek/clk-mt6779.c
@@ -919,6 +919,8 @@ 
 		    "pwm_sel", 19),
 	GATE_INFRA0(CLK_INFRA_PWM, "infra_pwm",
 		    "pwm_sel", 21),
+	GATE_INFRA0(CLK_INFRA_UART0, "infra_uart0",
+		    "uart_sel", 22),
 	GATE_INFRA0(CLK_INFRA_UART1, "infra_uart1",
 		    "uart_sel", 23),
 	GATE_INFRA0(CLK_INFRA_UART2, "infra_uart2",