From patchwork Sat Jun 11 04:22:37 2022 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Srinivasa Rao Mandadapu X-Patchwork-Id: 581342 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org Received: from vger.kernel.org (vger.kernel.org [23.128.96.18]) by smtp.lore.kernel.org (Postfix) with ESMTP id 02B04CCA47C for ; Sat, 11 Jun 2022 04:23:33 +0000 (UTC) Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S229656AbiFKEXb (ORCPT ); Sat, 11 Jun 2022 00:23:31 -0400 Received: from lindbergh.monkeyblade.net ([23.128.96.19]:43772 "EHLO lindbergh.monkeyblade.net" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S1350442AbiFKEXS (ORCPT ); Sat, 11 Jun 2022 00:23:18 -0400 Received: from alexa-out.qualcomm.com (alexa-out.qualcomm.com [129.46.98.28]) by lindbergh.monkeyblade.net (Postfix) with ESMTPS id 9D8261B7A3; Fri, 10 Jun 2022 21:23:12 -0700 (PDT) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=quicinc.com; i=@quicinc.com; q=dns/txt; s=qcdkim; t=1654921396; x=1686457396; h=from:to:cc:subject:date:message-id:in-reply-to: references:mime-version; bh=c8bqdAnqmktg0aOzLWCVGCCGf+orHFeBka/gFzLMk08=; b=H2zXt2+a43MctBkJND8y4Cpp+uUxUemZCHAKYsekmG84QHPnHTYY2F1D QMZZjB79fnmxTUXQX9FGgQnlKa+mChTHPjb68Mxw02MN0zr3a2FH/Ib8H oec4GDBtYXXtMphuXp3VlK2dH8O520zAxNVOh/s5cXygiYflxYsqLu7qj c=; Received: from ironmsg08-lv.qualcomm.com ([10.47.202.152]) by alexa-out.qualcomm.com with ESMTP; 10 Jun 2022 21:23:13 -0700 X-QCInternal: smtphost Received: from nasanex01c.na.qualcomm.com ([10.47.97.222]) by ironmsg08-lv.qualcomm.com with ESMTP/TLS/ECDHE-RSA-AES256-GCM-SHA384; 10 Jun 2022 21:23:11 -0700 Received: from nalasex01a.na.qualcomm.com (10.47.209.196) by nasanex01c.na.qualcomm.com (10.47.97.222) with Microsoft SMTP Server (version=TLS1_2, cipher=TLS_ECDHE_RSA_WITH_AES_256_GCM_SHA384) id 15.2.986.22; Fri, 10 Jun 2022 21:23:11 -0700 Received: from hu-srivasam-hyd.qualcomm.com (10.80.80.8) by nalasex01a.na.qualcomm.com (10.47.209.196) with Microsoft SMTP Server (version=TLS1_2, cipher=TLS_ECDHE_RSA_WITH_AES_256_GCM_SHA384) id 15.2.986.22; Fri, 10 Jun 2022 21:23:05 -0700 From: Srinivasa Rao Mandadapu To: , , , , , , , , , , , , , , , , , Linus Walleij , CC: Srinivasa Rao Mandadapu Subject: [PATCH v4 2/2] pinctrl: qcom: sc7280: Add clock optional check for ADSP bypass targets Date: Sat, 11 Jun 2022 09:52:37 +0530 Message-ID: <1654921357-16400-3-git-send-email-quic_srivasam@quicinc.com> X-Mailer: git-send-email 2.7.4 In-Reply-To: <1654921357-16400-1-git-send-email-quic_srivasam@quicinc.com> References: <1654921357-16400-1-git-send-email-quic_srivasam@quicinc.com> MIME-Version: 1.0 X-Originating-IP: [10.80.80.8] X-ClientProxiedBy: nasanex01a.na.qualcomm.com (10.52.223.231) To nalasex01a.na.qualcomm.com (10.47.209.196) Precedence: bulk List-ID: X-Mailing-List: linux-gpio@vger.kernel.org Update lpass lpi pin control driver, with clock optional check for ADSP disabled platforms. This check required for distingushing ADSP based platforms and ADSP bypass platforms. In case of ADSP enabled platforms, where audio is routed through ADSP macro and decodec GDSC Switches are triggered as clocks by pinctrl driver and ADSP firmware controls them. So It's mandatory to enable them in ADSP based solutions. In case of ADSP bypass platforms clock voting is optional as these macro and dcodec GDSC switches are maintained as power domains and operated from lpass clock drivers. Signed-off-by: Srinivasa Rao Mandadapu Reviewed-by: Stephen Boyd --- drivers/pinctrl/qcom/pinctrl-lpass-lpi.c | 2 ++ drivers/pinctrl/qcom/pinctrl-sc7280-lpass-lpi.c | 1 - 2 files changed, 2 insertions(+), 1 deletion(-) diff --git a/drivers/pinctrl/qcom/pinctrl-lpass-lpi.c b/drivers/pinctrl/qcom/pinctrl-lpass-lpi.c index 74810ec..b3d4244 100644 --- a/drivers/pinctrl/qcom/pinctrl-lpass-lpi.c +++ b/drivers/pinctrl/qcom/pinctrl-lpass-lpi.c @@ -388,6 +388,8 @@ int lpi_pinctrl_probe(struct platform_device *pdev) pctrl->data = data; pctrl->dev = &pdev->dev; + data->is_clk_optional = of_property_read_bool(np, "qcom,adsp-bypass-mode"); + pctrl->clks[0].id = "core"; pctrl->clks[1].id = "audio"; diff --git a/drivers/pinctrl/qcom/pinctrl-sc7280-lpass-lpi.c b/drivers/pinctrl/qcom/pinctrl-sc7280-lpass-lpi.c index 2add9a4..d615b6c5 100644 --- a/drivers/pinctrl/qcom/pinctrl-sc7280-lpass-lpi.c +++ b/drivers/pinctrl/qcom/pinctrl-sc7280-lpass-lpi.c @@ -141,7 +141,6 @@ static const struct lpi_pinctrl_variant_data sc7280_lpi_data = { .ngroups = ARRAY_SIZE(sc7280_groups), .functions = sc7280_functions, .nfunctions = ARRAY_SIZE(sc7280_functions), - .is_clk_optional = true, }; static const struct of_device_id lpi_pinctrl_of_match[] = {