From patchwork Wed May 3 17:02:30 2023 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Mukesh Ojha X-Patchwork-Id: 678982 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org Received: from vger.kernel.org (vger.kernel.org [23.128.96.18]) by smtp.lore.kernel.org (Postfix) with ESMTP id 6FB8FC83005 for ; Wed, 3 May 2023 17:06:46 +0000 (UTC) Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S229872AbjECRGo (ORCPT ); Wed, 3 May 2023 13:06:44 -0400 Received: from lindbergh.monkeyblade.net ([23.128.96.19]:44516 "EHLO lindbergh.monkeyblade.net" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S229958AbjECRGS (ORCPT ); Wed, 3 May 2023 13:06:18 -0400 Received: from mx0b-0031df01.pphosted.com (mx0b-0031df01.pphosted.com [205.220.180.131]) by lindbergh.monkeyblade.net (Postfix) with ESMTPS id 74DAD44BE; Wed, 3 May 2023 10:05:44 -0700 (PDT) Received: from pps.filterd (m0279868.ppops.net [127.0.0.1]) by mx0a-0031df01.pphosted.com (8.17.1.19/8.17.1.19) with ESMTP id 343CNuQo023512; Wed, 3 May 2023 17:04:30 GMT DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=quicinc.com; h=from : to : cc : subject : date : message-id : in-reply-to : references : mime-version : content-type; s=qcppdkim1; bh=efxYx05v5OB4oNzmC8NVjJ3IkNP0ZvL/60P9mec5Y+8=; b=XQEOB98z7kfm4JiiA4ZSFfqtTRrRr4b5+pXhp2gEZDtxK2L6T06MDO/0f78woRhA5ccj oJYSub3Y96Jkk7B/duYcoBv3rkM4toj9Dw7G42W1cywfNdqwGvEYv/dGUOtlGintTXDE m1OX7kL4yuew36xfdJrX11OP3rZt4WkzxdiXiUFaJoqGplL2GGZvkUX7hho3YO7H6U1z tlNDcuamJa/kBnKoLPuYETNliGcJsHJwo6vOoueO9UBysLr47lFdstjDbzzK4alnzR3h Tw9m6xgUOSMws5+8wCJh2ncw2mp4ecCLllSHTE44/i7FhsvOdN6kQVShlF08MF4gzR5t vA== Received: from nasanppmta02.qualcomm.com (i-global254.qualcomm.com [199.106.103.254]) by mx0a-0031df01.pphosted.com (PPS) with ESMTPS id 3qbmy48xxx-1 (version=TLSv1.2 cipher=ECDHE-RSA-AES256-GCM-SHA384 bits=256 verify=NOT); Wed, 03 May 2023 17:04:30 +0000 Received: from nasanex01c.na.qualcomm.com (nasanex01c.na.qualcomm.com [10.45.79.139]) by NASANPPMTA02.qualcomm.com (8.17.1.5/8.17.1.5) with ESMTPS id 343H4Tll004433 (version=TLSv1.2 cipher=ECDHE-RSA-AES256-GCM-SHA384 bits=256 verify=NOT); Wed, 3 May 2023 17:04:29 GMT Received: from hu-mojha-hyd.qualcomm.com (10.80.80.8) by nasanex01c.na.qualcomm.com (10.45.79.139) with Microsoft SMTP Server (version=TLS1_2, cipher=TLS_ECDHE_RSA_WITH_AES_256_GCM_SHA384) id 15.2.986.42; Wed, 3 May 2023 10:04:23 -0700 From: Mukesh Ojha To: , , , , , , , , , , , , , CC: , , , , , , "Mukesh Ojha" , Poovendhan Selvaraj Subject: [PATCH v3 16/18] firmware: scm: Modify only the download bits in TCSR register Date: Wed, 3 May 2023 22:32:30 +0530 Message-ID: <1683133352-10046-17-git-send-email-quic_mojha@quicinc.com> X-Mailer: git-send-email 2.7.4 In-Reply-To: <1683133352-10046-1-git-send-email-quic_mojha@quicinc.com> References: <1683133352-10046-1-git-send-email-quic_mojha@quicinc.com> MIME-Version: 1.0 X-Originating-IP: [10.80.80.8] X-ClientProxiedBy: nasanex01b.na.qualcomm.com (10.46.141.250) To nasanex01c.na.qualcomm.com (10.45.79.139) X-QCInternal: smtphost X-Proofpoint-Virus-Version: vendor=nai engine=6200 definitions=5800 signatures=585085 X-Proofpoint-ORIG-GUID: QTog9BocchrWl8se06eU3kcX_W_JM-ou X-Proofpoint-GUID: QTog9BocchrWl8se06eU3kcX_W_JM-ou X-Proofpoint-Virus-Version: vendor=baseguard engine=ICAP:2.0.254,Aquarius:18.0.942,Hydra:6.0.573,FMLib:17.11.170.22 definitions=2023-05-03_12,2023-05-03_01,2023-02-09_01 X-Proofpoint-Spam-Details: rule=outbound_notspam policy=outbound score=0 lowpriorityscore=0 bulkscore=0 priorityscore=1501 malwarescore=0 suspectscore=0 impostorscore=0 adultscore=0 mlxlogscore=999 spamscore=0 phishscore=0 clxscore=1015 mlxscore=0 classifier=spam adjust=0 reason=mlx scancount=1 engine=8.12.0-2303200000 definitions=main-2305030145 Precedence: bulk List-ID: X-Mailing-List: linux-gpio@vger.kernel.org CrashDump collection is based on the DLOAD bit of TCSR register. To retain other bits, we read the register and modify only the DLOAD bit as the other bits have their own significance. Signed-off-by: Poovendhan Selvaraj Signed-off-by: Mukesh Ojha --- drivers/firmware/qcom_scm.c | 8 ++++++-- 1 file changed, 6 insertions(+), 2 deletions(-) diff --git a/drivers/firmware/qcom_scm.c b/drivers/firmware/qcom_scm.c index 003cbcb..775ac68 100644 --- a/drivers/firmware/qcom_scm.c +++ b/drivers/firmware/qcom_scm.c @@ -30,6 +30,9 @@ module_param(download_mode, bool, 0); #define SCM_HAS_IFACE_CLK BIT(1) #define SCM_HAS_BUS_CLK BIT(2) +#define QCOM_DOWNLOAD_MODE_MASK 0x30 +#define QCOM_DOWNLOAD_FULLDUMP 0x1 + struct qcom_scm { struct device *dev; struct clk *core_clk; @@ -448,8 +451,9 @@ static void qcom_scm_set_download_mode(bool enable) if (avail) { ret = __qcom_scm_set_dload_mode(__scm->dev, enable); } else if (__scm->dload_mode_addr) { - ret = qcom_scm_io_writel(__scm->dload_mode_addr, - enable ? QCOM_SCM_BOOT_SET_DLOAD_MODE : 0); + ret = qcom_scm_io_update_field(__scm->dload_mode_addr, + QCOM_DOWNLOAD_MODE_MASK, + enable ? QCOM_DOWNLOAD_FULLDUMP : 0); } else { dev_err(__scm->dev, "No available mechanism for setting download mode\n");