From patchwork Fri Aug 9 16:33:19 2019 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Arnd Bergmann X-Patchwork-Id: 170960 Delivered-To: patch@linaro.org Received: by 2002:a92:512:0:0:0:0:0 with SMTP id q18csp10236658ile; Fri, 9 Aug 2019 09:34:05 -0700 (PDT) X-Google-Smtp-Source: APXvYqy37pzrrCxDRL9xtr19jMLG/97BY3f8UHUyIMDcUJzxpL9mp8dHY5oB50OOOU3Dn6goNUEu X-Received: by 2002:a63:20d:: with SMTP id 13mr18622533pgc.253.1565368445055; Fri, 09 Aug 2019 09:34:05 -0700 (PDT) ARC-Seal: i=1; a=rsa-sha256; t=1565368445; cv=none; d=google.com; s=arc-20160816; b=hZ5NXDbaNLnKrVvBicYRnEntLjAz6HsVOPQqsJjYppl5+XcPiNZdev8MPaI7MV+2xQ GG/TZKBMbdFhxg81FAmxleBO0CKbEvI5hF8J5k4yjTDDUFE/Az8KQXa3rd3h9RMNoBOu /IG60z+GvRs6o5JKQ7hPTzVhzptKVLzBKKdl3fyby7L48/70BPdYsW2fYRZ8FDJDsjh6 ykfQEOQV15NDX1633QY+OekLtq14J6pPAXURrtShj+uv7+2eWOSv7a+XMyK+iTwMskXy VpPyAt4HVrFXP4U090EF5ev7B9HaELbeMVk7gfgJcsxWDfkI1liguadJ4Vc/aub1msEd ir4g== ARC-Message-Signature: i=1; a=rsa-sha256; c=relaxed/relaxed; d=google.com; s=arc-20160816; h=list-id:precedence:sender:content-transfer-encoding:mime-version :references:in-reply-to:message-id:date:subject:cc:to:from; bh=8hIeFNKMVbFO/TapUQUiHLTUmdDrFlvysY2uBlSAfww=; b=RydC3J7n4P+O2ox5UkywmtxfEmNMcUUDXZK8eMnD6vPkO1tL8bHf6VrX8RM2j59X77 nwnHkpeu2rmx0cBQYbyOASOhDhEmjLT/0vYEHlch9DjTxk5nJ62TacqyNi7DvLP1x3+A Zs0vGZYXv9vi1iLm6PGg7kKkUExmyTSbWCJ6MrgfzV7K7c00N5D4FEAunZYW3P4kMwp7 sZZthpOl7xeonC4ogreyKduTafPd39HrsamHXOdUKDPedhtFnicpn8hpQ/tIxtkAmsGq RZGE58FkKmRg/mdAEzrhfQoyTmiiC2JUh/GpexNIu75qYU6A09nBbRPAYPnQjwAKpyuy rjTQ== ARC-Authentication-Results: i=1; mx.google.com; spf=pass (google.com: best guess record for domain of linux-gpio-owner@vger.kernel.org designates 209.132.180.67 as permitted sender) smtp.mailfrom=linux-gpio-owner@vger.kernel.org Return-Path: Received: from vger.kernel.org (vger.kernel.org. [209.132.180.67]) by mx.google.com with ESMTP id b1si802357pgd.263.2019.08.09.09.34.04; Fri, 09 Aug 2019 09:34:05 -0700 (PDT) Received-SPF: pass (google.com: best guess record for domain of linux-gpio-owner@vger.kernel.org designates 209.132.180.67 as permitted sender) client-ip=209.132.180.67; Authentication-Results: mx.google.com; spf=pass (google.com: best guess record for domain of linux-gpio-owner@vger.kernel.org designates 209.132.180.67 as permitted sender) smtp.mailfrom=linux-gpio-owner@vger.kernel.org Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S2437097AbfHIQeE (ORCPT + 5 others); Fri, 9 Aug 2019 12:34:04 -0400 Received: from mout.kundenserver.de ([212.227.126.131]:45279 "EHLO mout.kundenserver.de" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S2437156AbfHIQeB (ORCPT ); Fri, 9 Aug 2019 12:34:01 -0400 Received: from threadripper.lan ([149.172.19.189]) by mrelayeu.kundenserver.de (mreue010 [212.227.15.129]) with ESMTPA (Nemesis) id 1MiaLn-1iYmm935N9-00fn4k; Fri, 09 Aug 2019 18:33:50 +0200 From: Arnd Bergmann To: soc@kernel.org Cc: Arnd Bergmann , Russell King , Dan Williams , Vinod Koul , Linus Walleij , Bartosz Golaszewski , linux-arm-kernel@lists.infradead.org, linux-kernel@vger.kernel.org, dmaengine@vger.kernel.org, linux-gpio@vger.kernel.org, linux-i2c@vger.kernel.org Subject: [PATCH 5/7] ARM: xscale: fix multi-cpu compilation Date: Fri, 9 Aug 2019 18:33:19 +0200 Message-Id: <20190809163334.489360-5-arnd@arndb.de> X-Mailer: git-send-email 2.20.0 In-Reply-To: <20190809163334.489360-1-arnd@arndb.de> References: <20190809162956.488941-1-arnd@arndb.de> <20190809163334.489360-1-arnd@arndb.de> MIME-Version: 1.0 X-Provags-ID: V03:K1:wZlcz48ar72OTI0b4lRDVG5g8z7FKcBbmmlRwz5OyJHN+RZnSIu rPO+wv2A51N4cneEGdq5++c3p7S8W9hvSc0/+MJlbGu9ejYfTujT8svnratVAcjpJEGGv/T NXHhTUGyJQX/PS6OeT3qB34XlnqG4OMumh+VLw3NibgQKnG6LEXRUilqHtuedJI6D+RIZly Fm2LpeYj60KlsDF4evXVg== X-Spam-Flag: NO X-UI-Out-Filterresults: notjunk:1; V03:K0:p9OV/IkT9gI=:vQKEMVaVwwOvgHQ9k8wqNy frRgQ5iPSYZBBsJ8Qrbd1D1A1CH34rn2cdmC6UGHpIGXrTyp8CD2Aa78I5ZU4E9jyTv9WvdIl fbt/7UygAPSI8fo0/ttAzm1GSPsmpTVHt3DJLPiVMpWX4qAT63RJizHPB9OYD7IdxM5UQnwH9 LzDyHR8lG2qAV0gMRg6a8kksSkiEBhFFT1+JSKXdOVMSh/Wfm3ZYWTt1yUaYvD4fajrm1oM4X oHx1+k/fMd6xnGJZC1jvy9yy5ntt/RVfiy74k9RPx8cZ4JFLKxxQDwwlKvCbYnU4qWm+kEyfI Cnb6f+To5gLTzFOrAeaVq9rjR+CjsKD2hYMZ7n9pLVUWu1FsAPHu+eIbVkyTsPgzHivVNF3Fl T9Xl35tHU6a+7gMm/0epFHhknfyINhgxBBCVl4Y7YnTQrZ97ZYpZwYMTqdn9ZzvaEgO0hzKRd ofGcyc0AcO+aDSnWMN6PyWvOn2yuQWBxKjnmRNnx4uNKdkf2A5WKZaue0MYO59x7xX7PcCC3f d4+w9fPOaCT+U6hD4KHvhRJhkQ1ibQjgCOLS5NQuEsRO4yJkVR1RIxLB9PepRwK4SO4idjf7D HIM1rsTJ5V+xnSVw4JzkGeCHJC1dfPLXxhw4A9DvbGxKYVFF39vhTqy5t23p/4RsNyNZZJqp0 RHEMej39ZLyU/RccOCDWLGm4+2AWUCIv6b2hfUEJnCqEKAF1Aoz6hehAgXjaDaPThbJt/2iDa I6d+QTwbVTuZmWqY4lyKpeiDTl0FNdnCXrKRBQ== Sender: linux-gpio-owner@vger.kernel.org Precedence: bulk List-ID: X-Mailing-List: linux-gpio@vger.kernel.org Building a combined ARMv4+XScale kernel produces these and other build failures: /tmp/copypage-xscale-3aa821.s: Assembler messages: /tmp/copypage-xscale-3aa821.s:167: Error: selected processor does not support `pld [r7,#0]' in ARM mode /tmp/copypage-xscale-3aa821.s:168: Error: selected processor does not support `pld [r7,#32]' in ARM mode /tmp/copypage-xscale-3aa821.s:169: Error: selected processor does not support `pld [r1,#0]' in ARM mode /tmp/copypage-xscale-3aa821.s:170: Error: selected processor does not support `pld [r1,#32]' in ARM mode /tmp/copypage-xscale-3aa821.s:171: Error: selected processor does not support `pld [r7,#64]' in ARM mode /tmp/copypage-xscale-3aa821.s:176: Error: selected processor does not support `ldrd r4,r5,[r7],#8' in ARM mode /tmp/copypage-xscale-3aa821.s:180: Error: selected processor does not support `strd r4,r5,[r1],#8' in ARM mode Add an explict .arch armv5 in the inline assembly to allow the ARMv5 specific instructions regardless of the compiler -march= target. Signed-off-by: Arnd Bergmann --- arch/arm/mm/copypage-xscale.c | 6 ++++-- 1 file changed, 4 insertions(+), 2 deletions(-) -- 2.20.0 diff --git a/arch/arm/mm/copypage-xscale.c b/arch/arm/mm/copypage-xscale.c index 61d834157bc0..382e1c2855e8 100644 --- a/arch/arm/mm/copypage-xscale.c +++ b/arch/arm/mm/copypage-xscale.c @@ -42,6 +42,7 @@ static void mc_copy_user_page(void *from, void *to) * when prefetching destination as well. (NP) */ asm volatile ("\ +.arch xscale \n\ pld [%0, #0] \n\ pld [%0, #32] \n\ pld [%1, #0] \n\ @@ -106,8 +107,9 @@ void xscale_mc_clear_user_highpage(struct page *page, unsigned long vaddr) { void *ptr, *kaddr = kmap_atomic(page); - asm volatile( - "mov r1, %2 \n\ + asm volatile("\ +.arch xscale \n\ + mov r1, %2 \n\ mov r2, #0 \n\ mov r3, #0 \n\ 1: mov ip, %0 \n\