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CAT:NONE; SFS:(4636009)(39860400002)(136003)(396003)(376002)(346002)(36840700001)(46966006)(4326008)(1076003)(7636003)(6666004)(36756003)(356005)(70206006)(26005)(86362001)(36860700001)(47076005)(5660300002)(70586007)(110136005)(478600001)(336012)(426003)(36906005)(2906002)(83380400001)(316002)(8936002)(82310400003)(2616005)(82740400003)(8676002)(7696005)(54906003)(186003)(107886003)(2101003); DIR:OUT; SFP:1101; X-OriginatorOrg: Nvidia.com X-MS-Exchange-CrossTenant-OriginalArrivalTime: 31 Aug 2021 05:29:11.9382 (UTC) X-MS-Exchange-CrossTenant-Network-Message-Id: 7ae77144-d30a-4c28-6bef-08d96c4043d3 X-MS-Exchange-CrossTenant-Id: 43083d15-7273-40c1-b7db-39efd9ccc17a X-MS-Exchange-CrossTenant-OriginalAttributedTenantConnectingIp: TenantId=43083d15-7273-40c1-b7db-39efd9ccc17a; Ip=[216.228.112.34]; Helo=[mail.nvidia.com] X-MS-Exchange-CrossTenant-AuthSource: BN8NAM11FT011.eop-nam11.prod.protection.outlook.com X-MS-Exchange-CrossTenant-AuthAs: Anonymous X-MS-Exchange-CrossTenant-FromEntityHeader: HybridOnPrem X-MS-Exchange-Transport-CrossTenantHeadersStamped: CO6PR12MB5476 Precedence: bulk List-ID: X-Mailing-List: linux-gpio@vger.kernel.org From: Laxman Dewangan Implement the pinmux register save and restore for the GPIO configuration of pins. This helps in changing the pins configuration for suspend state only. Signed-off-by: Laxman Dewangan Signed-off-by: pshete --- drivers/pinctrl/tegra/pinctrl-tegra.c | 66 +++++++++++++++++++++++++++ drivers/pinctrl/tegra/pinctrl-tegra.h | 1 + 2 files changed, 67 insertions(+) diff --git a/drivers/pinctrl/tegra/pinctrl-tegra.c b/drivers/pinctrl/tegra/pinctrl-tegra.c index 195cfe557511..7f947c952e09 100644 --- a/drivers/pinctrl/tegra/pinctrl-tegra.c +++ b/drivers/pinctrl/tegra/pinctrl-tegra.c @@ -275,6 +275,66 @@ static int tegra_pinctrl_set_mux(struct pinctrl_dev *pctldev, return 0; } +static int tegra_pinctrl_gpio_save_config(struct pinctrl_dev *pctldev, + struct pinctrl_gpio_range *range, + unsigned offset) +{ + struct tegra_pmx *pmx = pinctrl_dev_get_drvdata(pctldev); + const struct tegra_pingroup *g; + unsigned group, num_pins; + const unsigned *pins; + int ret; + + for (group = 0; group < pmx->soc->ngroups; ++group) { + ret = tegra_pinctrl_get_group_pins(pctldev, group, &pins, &num_pins); + if (ret < 0 || num_pins != 1) + continue; + if (offset == pins[0]) + break; + } + + if (group == pmx->soc->ngroups) { + dev_err(pctldev->dev, "Pingroup not found for pin %u\n", offset); + return -EINVAL; + } + + g = &pmx->soc->groups[group]; + if (g->mux_reg >= 0) + pmx->gpio_conf[offset] = pmx_readl(pmx, g->mux_bank, g->mux_reg); + + return 0; +} + +static int tegra_pinctrl_gpio_restore_config(struct pinctrl_dev *pctldev, + struct pinctrl_gpio_range *range, + unsigned offset) +{ + struct tegra_pmx *pmx = pinctrl_dev_get_drvdata(pctldev); + const struct tegra_pingroup *g; + unsigned group, num_pins; + const unsigned *pins; + int ret; + + for (group = 0; group < pmx->soc->ngroups; ++group) { + ret = tegra_pinctrl_get_group_pins(pctldev, group, &pins, &num_pins); + if (ret < 0 || num_pins != 1) + continue; + if (offset == pins[0]) + break; + } + + if (group == pmx->soc->ngroups) { + dev_err(pctldev->dev, "Pingroup not found for pin %u\n", offset); + return -EINVAL; + } + + g = &pmx->soc->groups[group]; + if (g->mux_reg >= 0) + pmx_writel(pmx, pmx->gpio_conf[offset], g->mux_bank, g->mux_reg); + + return 0; +} + static int tegra_pinctrl_gpio_request_enable(struct pinctrl_dev *pctldev, struct pinctrl_gpio_range *range, unsigned int offset) @@ -326,6 +386,8 @@ static const struct pinmux_ops tegra_pinmux_ops = { .set_mux = tegra_pinctrl_set_mux, .gpio_request_enable = tegra_pinctrl_gpio_request_enable, .gpio_disable_free = tegra_pinctrl_gpio_disable_free, + .gpio_save_config = tegra_pinctrl_gpio_save_config, + .gpio_restore_config = tegra_pinctrl_gpio_restore_config, }; static int tegra_pinconf_reg(struct tegra_pmx *pmx, @@ -826,6 +888,10 @@ int tegra_pinctrl_probe(struct platform_device *pdev, if (!pmx->backup_regs) return -ENOMEM; + pmx->gpio_conf = devm_kzalloc(&pdev->dev, backup_regs_size, GFP_KERNEL); + if (!pmx->gpio_conf) + return -ENOMEM; + for (i = 0; i < pmx->nbanks; i++) { pmx->regs[i] = devm_platform_ioremap_resource(pdev, i); if (IS_ERR(pmx->regs[i])) diff --git a/drivers/pinctrl/tegra/pinctrl-tegra.h b/drivers/pinctrl/tegra/pinctrl-tegra.h index fcad7f74c5a2..c08c676bfa03 100644 --- a/drivers/pinctrl/tegra/pinctrl-tegra.h +++ b/drivers/pinctrl/tegra/pinctrl-tegra.h @@ -18,6 +18,7 @@ struct tegra_pmx { int nbanks; void __iomem **regs; u32 *backup_regs; + u32 *gpio_conf; }; enum tegra_pinconf_param {