diff --git a/drivers/gpio/gpio-rockchip.c b/drivers/gpio/gpio-rockchip.c
index 3703c3d71809..3c3bb47c3d79 100644
--- a/drivers/gpio/gpio-rockchip.c
+++ b/drivers/gpio/gpio-rockchip.c
@@ -26,6 +26,27 @@
 
 #define GPIO_TYPE_V1		(0)           /* GPIO Version ID reserved */
 #define GPIO_TYPE_V2		(0x01000C2B)  /* GPIO Version ID 0x01000C2B */
+#define GPIO_MAX_PINS	(32)
+
+struct rockchip_gpio {
+	struct device *dev;
+	void __iomem *reg_base;
+	struct gpio_chip gpio_chip;
+	struct irq_domain *domain;
+	const struct rockchip_gpio_regs	*gpio_regs;
+	struct device_node *of_node;
+	struct clk *clk;
+	struct clk *db_clk;
+	raw_spinlock_t slock;
+	u32 saved_masks;
+	u32 toggle_edge_mode;
+	int gpio_type;
+	int irq;
+	int id;
+};
+
+#define to_gpio_gpio(_gc) \
+	(container_of(_gc, struct rockchip_gpio, gpio_chip))
 
 static const struct rockchip_gpio_regs gpio_regs_v1 = {
 	.port_dr = 0x00,
@@ -70,7 +91,7 @@ static inline u32 gpio_readl_v2(void __iomem *reg)
 	return readl(reg + 0x4) << 16 | readl(reg);
 }
 
-static inline void rockchip_gpio_writel(struct rockchip_pin_bank *bank,
+static inline void rockchip_gpio_writel(struct rockchip_gpio *bank,
 					u32 value, unsigned int offset)
 {
 	void __iomem *reg = bank->reg_base + offset;
@@ -81,7 +102,7 @@ static inline void rockchip_gpio_writel(struct rockchip_pin_bank *bank,
 		writel(value, reg);
 }
 
-static inline u32 rockchip_gpio_readl(struct rockchip_pin_bank *bank,
+static inline u32 rockchip_gpio_readl(struct rockchip_gpio *bank,
 				      unsigned int offset)
 {
 	void __iomem *reg = bank->reg_base + offset;
@@ -95,7 +116,7 @@ static inline u32 rockchip_gpio_readl(struct rockchip_pin_bank *bank,
 	return value;
 }
 
-static inline void rockchip_gpio_writel_bit(struct rockchip_pin_bank *bank,
+static inline void rockchip_gpio_writel_bit(struct rockchip_gpio *bank,
 					    u32 bit, u32 value,
 					    unsigned int offset)
 {
@@ -117,7 +138,7 @@ static inline void rockchip_gpio_writel_bit(struct rockchip_pin_bank *bank,
 	}
 }
 
-static inline u32 rockchip_gpio_readl_bit(struct rockchip_pin_bank *bank,
+static inline u32 rockchip_gpio_readl_bit(struct rockchip_gpio *bank,
 					  u32 bit, unsigned int offset)
 {
 	void __iomem *reg = bank->reg_base + offset;
@@ -137,7 +158,7 @@ static inline u32 rockchip_gpio_readl_bit(struct rockchip_pin_bank *bank,
 static int rockchip_gpio_get_direction(struct gpio_chip *chip,
 				       unsigned int offset)
 {
-	struct rockchip_pin_bank *bank = gpiochip_get_data(chip);
+	struct rockchip_gpio *bank = gpiochip_get_data(chip);
 	u32 data;
 
 	data = rockchip_gpio_readl_bit(bank, offset, bank->gpio_regs->port_ddr);
@@ -150,7 +171,7 @@ static int rockchip_gpio_get_direction(struct gpio_chip *chip,
 static int rockchip_gpio_set_direction(struct gpio_chip *chip,
 				       unsigned int offset, bool input)
 {
-	struct rockchip_pin_bank *bank = gpiochip_get_data(chip);
+	struct rockchip_gpio *bank = gpiochip_get_data(chip);
 	unsigned long flags;
 	u32 data = input ? 0 : 1;
 
@@ -164,7 +185,7 @@ static int rockchip_gpio_set_direction(struct gpio_chip *chip,
 static void rockchip_gpio_set(struct gpio_chip *gc, unsigned int offset,
 			      int value)
 {
-	struct rockchip_pin_bank *bank = gpiochip_get_data(gc);
+	struct rockchip_gpio *bank = gpiochip_get_data(gc);
 	unsigned long flags;
 
 	raw_spin_lock_irqsave(&bank->slock, flags);
@@ -174,7 +195,7 @@ static void rockchip_gpio_set(struct gpio_chip *gc, unsigned int offset,
 
 static int rockchip_gpio_get(struct gpio_chip *gc, unsigned int offset)
 {
-	struct rockchip_pin_bank *bank = gpiochip_get_data(gc);
+	struct rockchip_gpio *bank = gpiochip_get_data(gc);
 	u32 data;
 
 	data = readl(bank->reg_base + bank->gpio_regs->ext_port);
@@ -188,7 +209,7 @@ static int rockchip_gpio_set_debounce(struct gpio_chip *gc,
 				      unsigned int offset,
 				      unsigned int debounce)
 {
-	struct rockchip_pin_bank *bank = gpiochip_get_data(gc);
+	struct rockchip_gpio *bank = gpiochip_get_data(gc);
 	const struct rockchip_gpio_regs	*reg = bank->gpio_regs;
 	unsigned long flags, div_reg, freq, max_debounce;
 	bool div_debounce_support;
@@ -295,7 +316,7 @@ static int rockchip_gpio_set_config(struct gpio_chip *gc, unsigned int offset,
  */
 static int rockchip_gpio_to_irq(struct gpio_chip *gc, unsigned int offset)
 {
-	struct rockchip_pin_bank *bank = gpiochip_get_data(gc);
+	struct rockchip_gpio *bank = gpiochip_get_data(gc);
 	unsigned int virq;
 
 	if (!bank->domain)
@@ -322,10 +343,10 @@ static const struct gpio_chip rockchip_gpiolib_chip = {
 static void rockchip_irq_demux(struct irq_desc *desc)
 {
 	struct irq_chip *chip = irq_desc_get_chip(desc);
-	struct rockchip_pin_bank *bank = irq_desc_get_handler_data(desc);
+	struct rockchip_gpio *bank = irq_desc_get_handler_data(desc);
 	u32 pend;
 
-	dev_dbg(bank->dev, "got irq for bank %s\n", bank->name);
+	dev_dbg(bank->dev, "got irq\n");
 
 	chained_irq_enter(chip, desc);
 
@@ -385,7 +406,7 @@ static void rockchip_irq_demux(struct irq_desc *desc)
 static int rockchip_irq_set_type(struct irq_data *d, unsigned int type)
 {
 	struct irq_chip_generic *gc = irq_data_get_irq_chip_data(d);
-	struct rockchip_pin_bank *bank = gc->private;
+	struct rockchip_gpio *bank = gc->private;
 	u32 mask = BIT(d->hwirq);
 	u32 polarity;
 	u32 level;
@@ -468,7 +489,7 @@ static int rockchip_irq_set_type(struct irq_data *d, unsigned int type)
 static int rockchip_irq_reqres(struct irq_data *d)
 {
 	struct irq_chip_generic *gc = irq_data_get_irq_chip_data(d);
-	struct rockchip_pin_bank *bank = gc->private;
+	struct rockchip_gpio *bank = gc->private;
 
 	return gpiochip_reqres_irq(&bank->gpio_chip, d->hwirq);
 }
@@ -476,7 +497,7 @@ static int rockchip_irq_reqres(struct irq_data *d)
 static void rockchip_irq_relres(struct irq_data *d)
 {
 	struct irq_chip_generic *gc = irq_data_get_irq_chip_data(d);
-	struct rockchip_pin_bank *bank = gc->private;
+	struct rockchip_gpio *bank = gc->private;
 
 	gpiochip_relres_irq(&bank->gpio_chip, d->hwirq);
 }
@@ -484,7 +505,7 @@ static void rockchip_irq_relres(struct irq_data *d)
 static void rockchip_irq_suspend(struct irq_data *d)
 {
 	struct irq_chip_generic *gc = irq_data_get_irq_chip_data(d);
-	struct rockchip_pin_bank *bank = gc->private;
+	struct rockchip_gpio *bank = gc->private;
 
 	bank->saved_masks = irq_reg_readl(gc, bank->gpio_regs->int_mask);
 	irq_reg_writel(gc, ~gc->wake_active, bank->gpio_regs->int_mask);
@@ -493,7 +514,7 @@ static void rockchip_irq_suspend(struct irq_data *d)
 static void rockchip_irq_resume(struct irq_data *d)
 {
 	struct irq_chip_generic *gc = irq_data_get_irq_chip_data(d);
-	struct rockchip_pin_bank *bank = gc->private;
+	struct rockchip_gpio *bank = gc->private;
 
 	irq_reg_writel(gc, bank->saved_masks, bank->gpio_regs->int_mask);
 }
@@ -508,7 +529,7 @@ static void rockchip_irq_disable(struct irq_data *d)
 	irq_gc_mask_set_bit(d);
 }
 
-static int rockchip_interrupts_register(struct rockchip_pin_bank *bank)
+static int rockchip_interrupts_register(struct rockchip_gpio *bank)
 {
 	unsigned int clr = IRQ_NOREQUEST | IRQ_NOPROBE | IRQ_NOAUTOEN;
 	struct irq_chip_generic *gc;
@@ -517,8 +538,7 @@ static int rockchip_interrupts_register(struct rockchip_pin_bank *bank)
 	bank->domain = irq_domain_add_linear(bank->of_node, 32,
 					&irq_generic_chip_ops, NULL);
 	if (!bank->domain) {
-		dev_warn(bank->dev, "could not init irq domain for bank %s\n",
-			 bank->name);
+		dev_warn(bank->dev, "could not init irq domain\n");
 		return -EINVAL;
 	}
 
@@ -527,8 +547,7 @@ static int rockchip_interrupts_register(struct rockchip_pin_bank *bank)
 					     handle_level_irq,
 					     clr, 0, 0);
 	if (ret) {
-		dev_err(bank->dev, "could not alloc generic chips for bank %s\n",
-			bank->name);
+		dev_err(bank->dev, "could not alloc generic chips\n");
 		irq_domain_remove(bank->domain);
 		return -EINVAL;
 	}
@@ -554,7 +573,7 @@ static int rockchip_interrupts_register(struct rockchip_pin_bank *bank)
 	gc->chip_types[0].chip.irq_set_type = rockchip_irq_set_type;
 	gc->chip_types[0].chip.irq_request_resources = rockchip_irq_reqres;
 	gc->chip_types[0].chip.irq_release_resources = rockchip_irq_relres;
-	gc->wake_enabled = IRQ_MSK(bank->nr_pins);
+	gc->wake_enabled = IRQ_MSK(GPIO_MAX_PINS);
 
 	/*
 	 * Linux assumes that all interrupts start out disabled/masked.
@@ -572,7 +591,7 @@ static int rockchip_interrupts_register(struct rockchip_pin_bank *bank)
 	return 0;
 }
 
-static int rockchip_gpiolib_register(struct rockchip_pin_bank *bank)
+static int rockchip_gpiolib_register(struct rockchip_gpio *bank)
 {
 	struct gpio_chip *gc;
 	int ret;
@@ -580,9 +599,9 @@ static int rockchip_gpiolib_register(struct rockchip_pin_bank *bank)
 	bank->gpio_chip = rockchip_gpiolib_chip;
 
 	gc = &bank->gpio_chip;
-	gc->base = bank->pin_base;
-	gc->ngpio = bank->nr_pins;
-	gc->label = bank->name;
+	gc->base = GPIO_MAX_PINS * bank->id;
+	gc->ngpio = GPIO_MAX_PINS;
+	gc->label = kasprintf(GFP_KERNEL, "gpio%d", bank->id);
 	gc->parent = bank->dev;
 
 	ret = gpiochip_add_data(gc, bank);
@@ -592,35 +611,6 @@ static int rockchip_gpiolib_register(struct rockchip_pin_bank *bank)
 		return ret;
 	}
 
-	/*
-	 * For DeviceTree-supported systems, the gpio core checks the
-	 * pinctrl's device node for the "gpio-ranges" property.
-	 * If it is present, it takes care of adding the pin ranges
-	 * for the driver. In this case the driver can skip ahead.
-	 *
-	 * In order to remain compatible with older, existing DeviceTree
-	 * files which don't set the "gpio-ranges" property or systems that
-	 * utilize ACPI the driver has to call gpiochip_add_pin_range().
-	 */
-	if (!of_property_read_bool(bank->of_node, "gpio-ranges")) {
-		struct device_node *pctlnp = of_get_parent(bank->of_node);
-		struct pinctrl_dev *pctldev = NULL;
-
-		if (!pctlnp)
-			return -ENODATA;
-
-		pctldev = of_pinctrl_get(pctlnp);
-		if (!pctldev)
-			return -ENODEV;
-
-		ret = gpiochip_add_pin_range(gc, dev_name(pctldev->dev), 0,
-					     gc->base, gc->ngpio);
-		if (ret) {
-			dev_err(bank->dev, "Failed to add pin range\n");
-			goto fail;
-		}
-	}
-
 	ret = rockchip_interrupts_register(bank);
 	if (ret) {
 		dev_err(bank->dev, "failed to register interrupt, %d\n", ret);
@@ -635,15 +625,10 @@ static int rockchip_gpiolib_register(struct rockchip_pin_bank *bank)
 	return ret;
 }
 
-static int rockchip_get_bank_data(struct rockchip_pin_bank *bank)
+static int rockchip_gpio_get_type(struct rockchip_gpio *bank)
 {
 	int id = 0;
 
-	bank->clk = of_clk_get(bank->of_node, 0);
-	if (IS_ERR(bank->clk))
-		return PTR_ERR(bank->clk);
-
-	clk_prepare_enable(bank->clk);
 	id = readl(bank->reg_base + gpio_regs_v2.version_id);
 
 	/* If not gpio v2, that is default to v1. */
@@ -664,7 +649,7 @@ static int rockchip_get_bank_data(struct rockchip_pin_bank *bank)
 	return 0;
 }
 
-static int rockchip_gpio_get_irq(struct rockchip_pin_bank *bank)
+static int rockchip_gpio_get_irq(struct rockchip_gpio *bank)
 {
 	struct device *dev = bank->dev;
 	struct fwnode_handle *fwnode = dev_fwnode(dev);
@@ -682,103 +667,67 @@ static int rockchip_gpio_get_irq(struct rockchip_pin_bank *bank)
 	return irq;
 }
 
-static struct rockchip_pin_bank *
-rockchip_gpio_find_bank(struct pinctrl_dev *pctldev, int id)
-{
-	struct rockchip_pinctrl *info;
-	struct rockchip_pin_bank *bank;
-	int i, found = 0;
-
-	info = pinctrl_dev_get_drvdata(pctldev);
-	bank = info->ctrl->pin_banks;
-	for (i = 0; i < info->ctrl->nr_banks; i++, bank++) {
-		if (bank->bank_num == id) {
-			found = 1;
-			break;
-		}
-	}
-
-	return found ? bank : NULL;
-}
-
 static int rockchip_gpio_probe(struct platform_device *pdev)
 {
 	struct device *dev = &pdev->dev;
 	struct device_node *np = dev->of_node;
-	struct device_node *pctlnp = of_get_parent(np);
-	struct pinctrl_dev *pctldev = NULL;
-	struct rockchip_pin_bank *bank = NULL;
-	struct rockchip_pin_output_deferred *cfg;
-	static int gpio;
+	struct rockchip_gpio *gpio;
+	static int static_gpio_id;
 	int id, ret;
 
-	if (!np || !pctlnp)
-		return -ENODEV;
-
-	pctldev = of_pinctrl_get(pctlnp);
-	if (!pctldev)
-		return -EPROBE_DEFER;
+	gpio = devm_kzalloc(dev, sizeof(*gpio), GFP_KERNEL);
+	if (!gpio)
+		return -ENOMEM;
 
 	id = of_alias_get_id(np, "gpio");
 	if (id < 0)
-		id = gpio++;
+		id = static_gpio_id++;
 
-	bank = rockchip_gpio_find_bank(pctldev, id);
-	if (!bank)
-		return -EINVAL;
+	gpio->id = id;
+	gpio->dev = dev;
+	gpio->of_node = np;
 
-	bank->dev = dev;
-	bank->of_node = np;
+	gpio->reg_base = devm_platform_ioremap_resource(pdev, 0);
+	if (IS_ERR(gpio->reg_base))
+		return PTR_ERR(gpio->reg_base);
 
-	raw_spin_lock_init(&bank->slock);
-	bank->reg_base = devm_platform_ioremap_resource(pdev, 0);
-	if (IS_ERR(bank->reg_base))
-		return PTR_ERR(bank->reg_base);
+	gpio->irq = rockchip_gpio_get_irq(gpio);
+	if (gpio->irq < 0)
+		return gpio->irq;
 
-	bank->irq = rockchip_gpio_get_irq(bank);
-	if (bank->irq < 0)
-		return bank->irq;
+	gpio->clk = of_clk_get(np, 0);
+	if (IS_ERR(gpio->clk))
+		return PTR_ERR(gpio->clk);
 
-	ret = rockchip_get_bank_data(bank);
-	if (ret)
-		return ret;
+	gpio->db_clk = of_clk_get(np, 1);
+	if (IS_ERR(gpio->db_clk))
+		gpio->db_clk = NULL;
 
-	/*
-	 * Prevent clashes with a deferred output setting
-	 * being added right at this moment.
-	 */
-	mutex_lock(&bank->deferred_lock);
+	clk_prepare_enable(gpio->clk);
 
-	ret = rockchip_gpiolib_register(bank);
+	ret = rockchip_gpio_get_type(gpio);
 	if (ret) {
-		clk_disable_unprepare(bank->clk);
-		mutex_unlock(&bank->deferred_lock);
+		clk_disable_unprepare(gpio->clk);
 		return ret;
 	}
 
-	while (!list_empty(&bank->deferred_output)) {
-		cfg = list_first_entry(&bank->deferred_output,
-				       struct rockchip_pin_output_deferred, head);
-		list_del(&cfg->head);
-
-		ret = rockchip_gpio_direction_output(&bank->gpio_chip, cfg->pin, cfg->arg);
-		if (ret)
-			dev_warn(dev, "setting output pin %u to %u failed\n", cfg->pin, cfg->arg);
+	raw_spin_lock_init(&gpio->slock);
 
-		kfree(cfg);
+	ret = rockchip_gpiolib_register(gpio);
+	if (ret) {
+		clk_disable_unprepare(gpio->clk);
+		return ret;
 	}
 
-	mutex_unlock(&bank->deferred_lock);
-
-	platform_set_drvdata(pdev, bank);
-	dev_info(dev, "probed %pOF\n", np);
+	platform_set_drvdata(pdev, gpio);
+	printk("%s: probed %s\n", __func__, dev_name(dev));
 
 	return 0;
 }
 
 static int rockchip_gpio_remove(struct platform_device *pdev)
 {
-	struct rockchip_pin_bank *bank = platform_get_drvdata(pdev);
+	struct rockchip_gpio *bank = platform_get_drvdata(pdev);
 
 	clk_disable_unprepare(bank->clk);
 	gpiochip_remove(&bank->gpio_chip);
