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[v2,1/2] pinctrl: renesas: allow up to 10 fields for drive_regs

Message ID 20220320092542.2308-2-wsa+renesas@sang-engineering.com
State New
Headers show
Series pinctrl: renesas: r8a77990: add drive-strength | expand

Commit Message

Wolfram Sang March 20, 2022, 9:25 a.m. UTC
Needed to support E3 and G2E drive regs.

Signed-off-by: Wolfram Sang <wsa+renesas@sang-engineering.com>
---
 drivers/pinctrl/renesas/sh_pfc.h | 2 +-
 1 file changed, 1 insertion(+), 1 deletion(-)

Comments

Geert Uytterhoeven April 1, 2022, 4:20 p.m. UTC | #1
On Mon, Mar 21, 2022 at 12:41 AM Wolfram Sang
<wsa+renesas@sang-engineering.com> wrote:
> Needed to support E3 and G2E drive regs.
>
> Signed-off-by: Wolfram Sang <wsa+renesas@sang-engineering.com>

Reviewed-by: Geert Uytterhoeven <geert+renesas@glider.be>
i.e. will queue in renesas-pinctrl-for-v5.19.

Gr{oetje,eeting}s,

                        Geert

--
Geert Uytterhoeven -- There's lots of Linux beyond ia32 -- geert@linux-m68k.org

In personal conversations with technical people, I call myself a hacker. But
when I'm talking to journalists I just say "programmer" or something like that.
                                -- Linus Torvalds
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Patch

diff --git a/drivers/pinctrl/renesas/sh_pfc.h b/drivers/pinctrl/renesas/sh_pfc.h
index 2479b4fb9cf9..86cdcb292e23 100644
--- a/drivers/pinctrl/renesas/sh_pfc.h
+++ b/drivers/pinctrl/renesas/sh_pfc.h
@@ -181,7 +181,7 @@  struct pinmux_drive_reg_field {
 
 struct pinmux_drive_reg {
 	u32 reg;
-	const struct pinmux_drive_reg_field fields[8];
+	const struct pinmux_drive_reg_field fields[10];
 };
 
 #define PINMUX_DRIVE_REG(name, r) \