From patchwork Fri Oct 28 15:35:02 2022 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Yassine Oudjana X-Patchwork-Id: 619705 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org Received: from vger.kernel.org (vger.kernel.org [23.128.96.18]) by smtp.lore.kernel.org (Postfix) with ESMTP id 474C6FA3746 for ; Fri, 28 Oct 2022 15:36:18 +0000 (UTC) Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S230480AbiJ1PgQ (ORCPT ); Fri, 28 Oct 2022 11:36:16 -0400 Received: from lindbergh.monkeyblade.net ([23.128.96.19]:54092 "EHLO lindbergh.monkeyblade.net" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S230210AbiJ1PgB (ORCPT ); Fri, 28 Oct 2022 11:36:01 -0400 Received: from mail-ed1-x52b.google.com (mail-ed1-x52b.google.com [IPv6:2a00:1450:4864:20::52b]) by lindbergh.monkeyblade.net (Postfix) with ESMTPS id 897F798352; Fri, 28 Oct 2022 08:35:42 -0700 (PDT) Received: by mail-ed1-x52b.google.com with SMTP id z97so8388256ede.8; Fri, 28 Oct 2022 08:35:42 -0700 (PDT) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=gmail.com; s=20210112; h=content-transfer-encoding:mime-version:references:in-reply-to :message-id:date:subject:cc:to:from:from:to:cc:subject:date :message-id:reply-to; bh=FHS4xwDjkiA0w7wmXV8oTrtUiAVe60d4UjcHzqznohk=; b=HQDYgYhhZviJPw6qArUMruXE/Xm5QXCqsZN88IXXu2qjbCBdY9c/xpcrkmfeLkngqU CgWrN8CFwdWnbH6go1dsy/ceLDKKkBGOuP2b663anhfdIWoVi01iAL5pPpsnoeLFHhWY lAXlJ3BYPRrwJpY5gMJJ27bQl7sOzZcsOKWhiKRp0ahau6wJGo8bU3zJwBbBfmz9s2As zU41STVdnizM+vZ5tlCy28kEqNKexwsN59V9snez96tNF/J+wyIKyy2m1RxpmSXhfs1f zKlSkQYalk1mxBSmusEVs3PmpQRoyCoNeGlxlVqhIDjH5aPjH1tvovJU87z1hVW86pVq v7wA== X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=1e100.net; s=20210112; h=content-transfer-encoding:mime-version:references:in-reply-to :message-id:date:subject:cc:to:from:x-gm-message-state:from:to:cc :subject:date:message-id:reply-to; bh=FHS4xwDjkiA0w7wmXV8oTrtUiAVe60d4UjcHzqznohk=; b=nmhVtnzfBDCJfFZoIQvcg+SDZ1zS2AjJvEI2QKDD+xfW6UhJBeQxydmjrdEJYWiywW iITE8hgW75p3fhU6B+qkr/3cNlIsnjBV110jzxZAr0bAKNqbHxabMGTQeAj+rXmKpCDk 8PSrbAOv8UlZhdfjsvviwae8d1uJ/lo1ohwRFH5Zmyp16O8x9BG2+pc5zL6kBwCNtBlg UnDFRzqB0OwMYaPADr1wMiHf/AIAZqGPBgJTKpX4o9xg6LaBLWfPyL6IJObrm2/TiEjD V4smWdbW/mNcRQrnXM3n11j7nONOtdBFynsiNPaQd0J1dxf1BHp91IN07bADKE0zEl0V rLaA== X-Gm-Message-State: ACrzQf0Sop7ckXG6xzvHByD7jRRj/+XGmkBycXPzqyzI6X8xIeRtlR16 CHjdS5csi/MXtJTUK1jE/EM= X-Google-Smtp-Source: AMsMyM5/1YEa9PejtBsdYNmSs9vBC+HCwPcIUqWmAUvP0reCGads9tKDUceYNZXuRialiLEzqocRdw== X-Received: by 2002:aa7:d889:0:b0:460:62ef:2695 with SMTP id u9-20020aa7d889000000b0046062ef2695mr40743753edq.273.1666971341142; Fri, 28 Oct 2022 08:35:41 -0700 (PDT) Received: from localhost.localdomain ([95.183.227.98]) by smtp.gmail.com with ESMTPSA id ds12-20020a0564021ccc00b00461aebb2fe2sm2830635edb.54.2022.10.28.08.35.39 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Fri, 28 Oct 2022 08:35:40 -0700 (PDT) From: Yassine Oudjana X-Google-Original-From: Yassine Oudjana To: Linus Walleij , Rob Herring , Krzysztof Kozlowski , Matthias Brugger , Sean Wang , Andy Teng , AngeloGioacchino Del Regno Cc: Yassine Oudjana , Yassine Oudjana , linux-mediatek@lists.infradead.org, linux-gpio@vger.kernel.org, devicetree@vger.kernel.org, linux-arm-kernel@lists.infradead.org, linux-kernel@vger.kernel.org Subject: [PATCH v4 10/13] arm64: dts: mediatek: mt6797: Make pin configuration nodes follow DT bindings Date: Fri, 28 Oct 2022 18:35:02 +0300 Message-Id: <20221028153505.23741-11-y.oudjana@protonmail.com> X-Mailer: git-send-email 2.38.1 In-Reply-To: <20221028153505.23741-1-y.oudjana@protonmail.com> References: <20221028153505.23741-1-y.oudjana@protonmail.com> MIME-Version: 1.0 Precedence: bulk List-ID: X-Mailing-List: linux-gpio@vger.kernel.org From: Yassine Oudjana Add -pins suffix to pin configuration nodes to follow DT bindings and pass dtbs_check. Signed-off-by: Yassine Oudjana --- arch/arm64/boot/dts/mediatek/mt6797.dtsi | 20 ++++++++++---------- 1 file changed, 10 insertions(+), 10 deletions(-) diff --git a/arch/arm64/boot/dts/mediatek/mt6797.dtsi b/arch/arm64/boot/dts/mediatek/mt6797.dtsi index 15616231022a..0c2b477184ae 100644 --- a/arch/arm64/boot/dts/mediatek/mt6797.dtsi +++ b/arch/arm64/boot/dts/mediatek/mt6797.dtsi @@ -135,70 +135,70 @@ pio: pinctrl@10005000 { gpio-controller; #gpio-cells = <2>; - uart0_pins_a: uart0 { + uart0_pins_a: uart0-pins { pins0 { pinmux = , ; }; }; - uart1_pins_a: uart1 { + uart1_pins_a: uart1-pins { pins1 { pinmux = , ; }; }; - i2c0_pins_a: i2c0 { + i2c0_pins_a: i2c0-pins { pins0 { pinmux = , ; }; }; - i2c1_pins_a: i2c1 { + i2c1_pins_a: i2c1-pins { pins1 { pinmux = , ; }; }; - i2c2_pins_a: i2c2 { + i2c2_pins_a: i2c2-pins { pins2 { pinmux = , ; }; }; - i2c3_pins_a: i2c3 { + i2c3_pins_a: i2c3-pins { pins3 { pinmux = , ; }; }; - i2c4_pins_a: i2c4 { + i2c4_pins_a: i2c4-pins { pins4 { pinmux = , ; }; }; - i2c5_pins_a: i2c5 { + i2c5_pins_a: i2c5-pins { pins5 { pinmux = , ; }; }; - i2c6_pins_a: i2c6 { + i2c6_pins_a: i2c6-pins { pins6 { pinmux = , ; }; }; - i2c7_pins_a: i2c7 { + i2c7_pins_a: i2c7-pins { pins7 { pinmux = , ;