diff mbox series

[DO,NOT,APPLY,v6,10/13] pinctrl: renesas: rzg2l-poeg: output-disable request from GPT when both outputs are low.

Message ID 20230306090014.128732-11-biju.das.jz@bp.renesas.com
State New
Headers show
Series Add pinctrl sysfs and RZ/G2L POEG support | expand

Commit Message

Biju Das March 6, 2023, 9 a.m. UTC 
This patch adds support fpr output-disable requests from GPT, when both
outputs are low.

Added sysfs to enable/disable for configuring GPT output disable request
when both outputs are low.

Signed-off-by: Biju Das <biju.das.jz@bp.renesas.com>
---
 drivers/pinctrl/renesas/poeg/rzg2l-poeg.c | 16 ++++++++++++++++
 1 file changed, 16 insertions(+)
diff mbox series

Patch

diff --git a/drivers/pinctrl/renesas/poeg/rzg2l-poeg.c b/drivers/pinctrl/renesas/poeg/rzg2l-poeg.c
index b6f01065c058..bbca21557a70 100644
--- a/drivers/pinctrl/renesas/poeg/rzg2l-poeg.c
+++ b/drivers/pinctrl/renesas/poeg/rzg2l-poeg.c
@@ -97,6 +97,20 @@  static int rzg2l_poeg_output_disable_both_high(struct rzg2l_poeg_chip *chip,
 	return 0;
 }
 
+static int rzg2l_poeg_output_disable_both_low(struct rzg2l_poeg_chip *chip,
+					      bool enable)
+{
+	if (enable)
+		set_bit(RZG2L_GPT_OABLF, chip->gpt_irq);
+	else
+		clear_bit(RZG2L_GPT_OABLF, chip->gpt_irq);
+
+	rzg2l_gpt_poeg_disable_req_both_low(chip->gpt_dev, chip->index,
+					    test_bit(RZG2L_GPT_OABLF, chip->gpt_irq));
+
+	return 0;
+}
+
 static int rzg2l_poeg_cb(void *context, const char *fname, const char *gname,
 			 enum pin_output_disable_conf conf,
 			 unsigned int conf_val)
@@ -123,6 +137,8 @@  static int rzg2l_poeg_cb(void *context, const char *fname, const char *gname,
 		ret = rzg2l_poeg_output_disable_both_high(context, !!conf_val);
 		break;
 	case PINCTRL_OUTPUT_DISABLE_BY_SOC_ON_PIN_OUTPUT_LOW:
+		ret = rzg2l_poeg_output_disable_both_low(context, !!conf_val);
+		break;
 	case PINCTRL_OUTPUT_DISABLE_BY_SOC_ON_DEAD_TIME_ERROR:
 	default:
 		return -EINVAL;