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Fri, 24 Mar 2023 14:37:30 +0000 Received: from VI1PR0402MB3439.eurprd04.prod.outlook.com ([fe80::6802:b2c3:5f12:8f9f]) by VI1PR0402MB3439.eurprd04.prod.outlook.com ([fe80::6802:b2c3:5f12:8f9f%2]) with mapi id 15.20.6178.038; Fri, 24 Mar 2023 14:37:30 +0000 From: Chester Lin To: Linus Walleij , Andy Shevchenko Cc: Chester Lin , NXP S32 Linux Team , linux-gpio@vger.kernel.org, linux-kernel@vger.kernel.org, linux-arm-kernel@lists.infradead.org, Ghennadi Procopciuc , Andrei Stefanescu , Radu Pirea , =?utf-8?q?Andreas_F=C3=A4rber?= , Matthias Brugger Subject: [PATCH v4 2/5] pinctrl: s32cc: refactor pin config parsing Date: Fri, 24 Mar 2023 22:36:23 +0800 Message-Id: <20230324143626.16336-3-clin@suse.com> X-Mailer: git-send-email 2.37.3 In-Reply-To: <20230324143626.16336-1-clin@suse.com> References: <20230324143626.16336-1-clin@suse.com> X-ClientProxiedBy: TYCP301CA0053.JPNP301.PROD.OUTLOOK.COM (2603:1096:400:384::20) To VI1PR0402MB3439.eurprd04.prod.outlook.com (2603:10a6:803:4::13) MIME-Version: 1.0 X-MS-PublicTrafficType: Email X-MS-TrafficTypeDiagnostic: VI1PR0402MB3439:EE_|VE1PR04MB7454:EE_ X-MS-Office365-Filtering-Correlation-Id: 36c981a7-8f04-46e3-f94b-08db2c754c1e X-MS-Exchange-SenderADCheck: 1 X-MS-Exchange-AntiSpam-Relay: 0 X-Microsoft-Antispam: BCL:0; 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Signed-off-by: Chester Lin Reviewed-by: Andy Shevchenko --- (No change since v3) drivers/pinctrl/nxp/pinctrl-s32cc.c | 52 ++++++++++++++++++----------- 1 file changed, 33 insertions(+), 19 deletions(-) diff --git a/drivers/pinctrl/nxp/pinctrl-s32cc.c b/drivers/pinctrl/nxp/pinctrl-s32cc.c index f698e1a240ef..36f323f87785 100644 --- a/drivers/pinctrl/nxp/pinctrl-s32cc.c +++ b/drivers/pinctrl/nxp/pinctrl-s32cc.c @@ -474,11 +474,38 @@ static int s32_get_slew_regval(int arg) return -EINVAL; } -static int s32_get_pin_conf(enum pin_config_param param, u32 arg, - unsigned int *mask, unsigned int *config) +static inline void s32_pin_set_pull(enum pin_config_param param, + unsigned int *mask, unsigned int *config) { + switch (param) { + case PIN_CONFIG_BIAS_DISABLE: + case PIN_CONFIG_BIAS_HIGH_IMPEDANCE: + *config &= ~(S32_MSCR_PUS | S32_MSCR_PUE); + break; + case PIN_CONFIG_BIAS_PULL_UP: + *config |= S32_MSCR_PUS | S32_MSCR_PUE; + break; + case PIN_CONFIG_BIAS_PULL_DOWN: + *config &= ~S32_MSCR_PUS; + *config |= S32_MSCR_PUE; + break; + default: + return; + } + + *mask |= S32_MSCR_PUS | S32_MSCR_PUE; +} + +static int s32_parse_pincfg(unsigned long pincfg, unsigned int *mask, + unsigned int *config) +{ + enum pin_config_param param; + u32 arg; int ret; + param = pinconf_to_config_param(pincfg); + arg = pinconf_to_config_argument(pincfg); + switch (param) { /* All pins are persistent over suspend */ case PIN_CONFIG_PERSIST_STATE: @@ -508,26 +535,15 @@ static int s32_get_pin_conf(enum pin_config_param param, u32 arg, *config |= S32_MSCR_SRE((u32)ret); *mask |= S32_MSCR_SRE(~0); break; + case PIN_CONFIG_BIAS_DISABLE: case PIN_CONFIG_BIAS_PULL_UP: - if (arg) - *config |= S32_MSCR_PUS; - else - *config &= ~S32_MSCR_PUS; - fallthrough; case PIN_CONFIG_BIAS_PULL_DOWN: - if (arg) - *config |= S32_MSCR_PUE; - else - *config &= ~S32_MSCR_PUE; - *mask |= S32_MSCR_PUE | S32_MSCR_PUS; + s32_pin_set_pull(param, mask, config); break; case PIN_CONFIG_BIAS_HIGH_IMPEDANCE: *config &= ~(S32_MSCR_ODE | S32_MSCR_OBE | S32_MSCR_IBE); *mask |= S32_MSCR_ODE | S32_MSCR_OBE | S32_MSCR_IBE; - fallthrough; - case PIN_CONFIG_BIAS_DISABLE: - *config &= ~(S32_MSCR_PUS | S32_MSCR_PUE); - *mask |= S32_MSCR_PUS | S32_MSCR_PUE; + s32_pin_set_pull(param, mask, config); break; default: return -EOPNOTSUPP; @@ -553,9 +569,7 @@ static int s32_pinconf_mscr_update(struct pinctrl_dev *pctldev, pin_get_name(pctldev, pin_id), num_configs); for (i = 0; i < num_configs; i++) { - ret = s32_get_pin_conf(pinconf_to_config_param(configs[i]), - pinconf_to_config_argument(configs[i]), - &mask, &config); + ret = s32_parse_pincfg(configs[i], &mask, &config); if (ret) return ret; }